Extract from the Register of European Patents

About this file: EP1037139

EP1037139 - Adder circuit with addition end signal [Right-click to bookmark this link]
Former [2000/38]Adder circuit
[2003/14]
StatusNo opposition filed within time limit
Status updated on  20.08.2004
Database last updated on 08.12.2017
Most recent event   Tooltip20.08.2004No opposition filed within time limitpublished on 06.10.2004  [2004/41]
Applicant(s)For all designated states
FUJITSU LIMITED
1-1, Kamikodanaka 4-chome, Nakahara-ku Kawasaki-shi
Kanagawa 211-8588 / JP
[N/P]
Former [2003/42]For all designated states
FUJITSU LIMITED
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
Former [2000/38]For all designated states
FUJITSU LIMITED
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
Inventor(s)01 / Kuroiwa, Koichi, c/o Fujitsu Limited
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
02 / Taniguchi, Shoji c/o Fujitsu Limited
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
03 / Kanasugi, Masami c/o Fujitsu Limited
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
04 / Hikita, Mahiro, c/o Fujitsu Limited
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
 [2003/42]
Former [2000/38]01 / Kuroiwa, Koichi, c/o Fujitsu Limited
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
02 / Taniguchi, Shoji c/o Fujitsu Limited
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
03 / Kanasugi, Masami c/o Fujitsu Limited
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
04 / Hikita, Mahirom, c/o Fujitsu Limited
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
Representative(s)Stebbing, Timothy Charles , et al
Haseltine Lake LLP
Lincoln House, 5th Floor
300 High Holborn
London WC1V 7JH / GB
[N/P]
Former [2000/38]Stebbing, Timothy Charles , et al
Haseltine Lake & Co., Imperial House, 15-19 Kingsway
London WC2B 6UD / GB
Application number, filing date00301803.306.03.2000
[2000/38]
Priority number, dateJP1999007262917.03.1999         Original published format: JP 7262999
[2000/38]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP1037139
Date:20.09.2000
Language:EN
[2000/38]
Type: B1 Patent specification 
No.:EP1037139
Date:15.10.2003
Language:EN
[2003/42]
Search report(s)(Supplementary) European search report -
dispatched on:
EP03.07.2000
ClassificationInternational:G06F7/50
[2000/38]
Designated contracting statesDE,   FR,   GB [2001/23]
Former [2000/38]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Addierschaltung mit Addier-End-Signal[2003/14]
English:Adder circuit with addition end signal[2003/14]
French:Circuit additionneur avec un signal de fin d'addition[2003/14]
Former [2000/38]Addierschaltung
Former [2000/38]Adder circuit
Former [2000/38]Circuit additionneur
Examination procedure18.09.2000Examination requested  [2000/46]
31.07.2002Despatch of a communication from the examining division (Time limit: M04)
07.12.2002Reply to a communication from the examining division
28.03.2003Communication of intention to grant the patent
23.07.2003Fee for grant paid
23.07.2003Fee for publishing/printing paid
Opposition(s)16.07.2004No opposition filed within time limit [2004/41]
Fees paidRenewal fee
27.03.2002Renewal fee patent year 03
26.03.2003Renewal fee patent year 04
Documents cited:Search[X]US3138703  (MALEY GERALD A) [X] 1-7 * figures 2,4,5 *;
 [A]US3098153  (JACOB HEIJN HERMAN) [A] 4 * figures 3,6 *;
 [A]EP0797315  (TSUBOCHI KAZUO [JP]) [A] 7 * figures 8,9 *
 [X]  JOHNSON D ET AL, "DESIGN AND ANALYSIS OF ASYNCHRONOUS ADDERS", IEE PROCEEDINGS: COMPUTERS AND DIGITAL TECHNIQUES,GB,IEE, (19980101), vol. 145, no. 1, ISSN 1350-2387, pages 1 - 8, XP000768920 [X] 1-7 * page 2, column R, paragraph L - page 3, column L, paragraph 1; figure 3 * * page 4, column R, paragraph 2; figure 4 *

DOI:   http://dx.doi.org/10.1049/ip-cdt:19981770
 [A]  DE GLORIA A ET AL, "STATISTICAL CARRY LOOKAHEAD ADDERS", IEEE TRANSACTIONS ON COMPUTERS,US,IEEE INC. NEW YORK, (19960301), vol. 45, no. 3, ISSN 0018-9340, pages 340 - 347, XP000582968 [A] 1 * page 344; figure 5 *

DOI:   http://dx.doi.org/10.1109/12.485572