Extract from the Register of European Patents

About this file: EP1259964

EP1259964 - NON-VOLATILE NOR TWO-TRANSISTOR SEMICONDUCTOR MEMORY CELL, A CORRESPONDING NOR SEMICONDUCTOR MEMORY DEVICE AND A METHOD FOR THE PRODUCTION THEREOF [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  29.06.2007
Database last updated on 16.06.2018
Most recent event   Tooltip21.12.2007Change - lapse in a contracting state
State(s) deleted from list of lapses: IT
published on 23.01.2008  [2008/04]
Applicant(s)For all designated states
Infineon Technologies AG
St.-Martin-Strasse 53
81669 München / DE
[2006/34]
Former [2002/48]For all designated states
Infineon Technologies AG
St.-Martin-Strasse 53
81669 München / DE
Inventor(s)01 / GEORGAKOS, Georg
Am Geissberg 1
85447 Fraunberg / DE
02 / SZCZYPINSKI, Kazimierz
Budapester Strasse 2
81669 München / DE
 [2002/48]
Representative(s)Kindermann, Peter
Patentanwälte Kindermann
Postfach 10 02 34
85593 Baldham / DE
[N/P]
Former [2002/48]Kindermann, Peter, Dipl.-Ing.
Kindermann Patentanwälte Postfach 1330
85627 Grasbrunn / DE
Application number, filing date01951355.501.06.2001
[2002/48]
WO2001DE02069
Priority number, dateDE200012842206.06.2000         Original published format: DE 10028422
[2002/48]
Filing languageDE
Procedural languageDE
PublicationType: A1  Application with search report
No.:WO0195337
Date:13.12.2001
Language:DE
[2001/50]
Type: A1 Application with search report 
No.:EP1259964
Date:27.11.2002
Language:DE
The application has been published by WIPO in one of the EPO official languages on 13.12.2001
[2002/48]
Type: B1 Patent specification 
No.:EP1259964
Date:23.08.2006
Language:DE
[2006/34]
Search report(s)International search report - published on:EP13.12.2001
ClassificationInternational:G11C16/04
[2002/48]
Designated contracting statesDE,   FR,   GB,   IT [2004/21]
Former [2002/48]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE,  TR 
Extension statesALNot yet paid
LTNot yet paid
LVNot yet paid
MKNot yet paid
RONot yet paid
SINot yet paid
TitleGerman:NICHTFLÜCHTIGE NOR-ZWEITRANSISTOR-HALBLEITERSPEICHERZELLE SOWIE DAZUGEHÖRIGE NOR-HALBLEITERSPEICHEREINRICHTUNG UND VERFAHREN ZU DEREN HERSTELLUNG[2002/48]
English:NON-VOLATILE NOR TWO-TRANSISTOR SEMICONDUCTOR MEMORY CELL, A CORRESPONDING NOR SEMICONDUCTOR MEMORY DEVICE AND A METHOD FOR THE PRODUCTION THEREOF[2002/48]
French:CELLULE DE MEMOIRE A SEMI-CONDUCTEUR NON-OU NON VOLATILE A DEUX TRANSISTORS, DISPOSITIF DE MEMOIRE A SEMI-CONDUCTEUR NON-OU CORRESPONDANT ET LEUR PROCEDE DE PRODUCTION[2002/48]
Entry into regional phase12.08.2002National basic fee paid 
12.08.2002Designation fee(s) paid 
12.08.2002Examination fee paid 
Examination procedure10.12.2001Request for preliminary examination filed
International Preliminary Examining Authority: EP
12.08.2002Examination requested  [2002/48]
02.08.2005Despatch of a communication from the examining division (Time limit: M04)
11.11.2005Reply to a communication from the examining division
26.04.2006Communication of intention to grant the patent
11.07.2006Fee for grant paid
11.07.2006Fee for publishing/printing paid
Opposition(s)24.05.2007No opposition filed within time limit [2007/31]
Fees paidRenewal fee
21.06.2003Renewal fee patent year 03
17.06.2004Renewal fee patent year 04
06.06.2005Renewal fee patent year 05
26.06.2006Renewal fee patent year 06
Lapses during opposition  TooltipGB23.08.2006
[2008/04]
Former [2007/36]GB23.08.2006
IT23.08.2006
Former [2007/28]GB23.08.2006
Cited inInternational search[A]WO9919880  (PROGRAMMABLE MICROELECTRONICS [US], et al) [A] 1,10 * page 8, line 4 - page 11, line 7; figures 3,4 *;
 [A]US5867429  (CHEN JIAN [US], et al) [A] 1 * column 4, line 34 - line 67; figures 3A-3D,4,7 *