Extract from the Register of European Patents

About this file: EP1758378

EP1758378 - Scanning-line interpolating circuit, scanning-line interpolating method to be used in same circuit, and image display device provided with same circuit [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  15.01.2010
Database last updated on 17.08.2019
Most recent event   Tooltip15.01.2010Application deemed to be withdrawnpublished on 17.02.2010  [2010/07]
Applicant(s)For all designated states
Pioneer Corporation
4-1, Meguro 1-chome
Meguro-ku
Tokyo / JP
For all designated states
Pioneer Plasma Display Corporation
2080, Ohnohara-cho
Izumi, Kagoshima Prefecture / JP
[N/P]
Former [2007/09]For all designated states
Pioneer Corporation
4-1, Meguro 1-chome Meguro-ku
Tokyo / JP
For all designated states
Pioneer Plasma Display Corporation
2080, Ohnohara-cho
Izumi, Kagoshima Prefecture / JP
Inventor(s)01 / Yamashita, Taketoshi, Pioneer Plasma Display Corp.
2080, Ohnohara-cho, Izumi
Kagoshima / JP
 [2007/09]
Representative(s)Betten & Resch
Patent- und Rechtsanwälte PartGmbB
Maximiliansplatz 14
80333 München / DE
[N/P]
Former [2007/09]Betten & Resch
Patentanwälte, Theatinerstrasse 8
80333 München / DE
Application number, filing date06119580.625.08.2006
[2007/09]
Priority number, dateJP2005024597826.08.2005         Original published format: JP 2005245978
[2007/09]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP1758378
Date:28.02.2007
Language:EN
[2007/09]
Type: A3 Search report 
No.:EP1758378
Date:18.02.2009
[2009/08]
Search report(s)(Supplementary) European search report - dispatched on:EP20.01.2009
ClassificationInternational:H04N5/44
[2007/09]
Designated contracting states[2009/43]
Former [2007/09]AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HU,  IE,  IS,  IT,  LI,  LT,  LU,  LV,  MC,  NL,  PL,  PT,  RO,  SE,  SI,  SK,  TR 
TitleGerman:Abtastzeilen-Interpolationsschaltung, Abtastzeilen-Interpolationsverfahren und Anzeigevorrichtung[2007/09]
English:Scanning-line interpolating circuit, scanning-line interpolating method to be used in same circuit, and image display device provided with same circuit[2007/09]
French:Circuit interpolateur de lignes de balayage, procédé d'interpolation de lignes de balayage et dispositif d'affichage[2007/09]
Examination procedure19.08.2009Application deemed to be withdrawn, date of legal effect  [2010/07]
25.09.2009Despatch of communication that the application is deemed to be withdrawn, reason: examination fee not paid in time  [2010/07]
Fees paidRenewal fee
29.08.2008Renewal fee patent year 03
Penalty fee
Additional fee for renewal fee
31.08.200904   M06   Not yet paid
Documents cited:Search[A]US2003038817  (KAWAMURA HIDEAKI [JP], et al) [A] 1,4,10,13 * paragraph [0005] * * paragraph [0006] * * figure 2 *;
 [X]  HAAN DE G ET AL, "Deinterlacing - An overview", PROCEEDINGS OF THE IEEE, IEEE. NEW YORK, US, (19980901), vol. 86, no. 9, ISSN 0018-9219, pages 1839 - 1857, XP011044084 [X] 1,4,10,13 * page 6, column 1 * * figure 8 *

DOI:   http://dx.doi.org/10.1109/5.705528
 [A]  SALONEN J ET AL, "EDGE ADAPTIVE INTERPOLATION FOR SCANNING RATE CONVERSIONS", SIGNAL PROCESSING OF HDTV. PROCEEDINGS OF THE INTERNATIONALWORKSHOP ON HDTV, XX, XX, (19930101), vol. 4, pages 757 - 764, XP000614509 [A] 1,10,13 * abstract * * introduction * * figure 2 *
by applicantJP2005245978
 JP2003018397
 JP2002185934