Extract from the Register of European Patents

About this file: EP0073509

EP0073509 - Semiconductor integrated circuit device [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  14.06.1989
Database last updated on 07.12.2019
Most recent event   Tooltip14.06.1989No opposition filed within time limitpublished on 02.08.1989 [1989/31]
Applicant(s)For all designated states
Kabushiki Kaisha Toshiba
72, Horikawa-cho, Saiwai-ku Kawasaki-shi
Kanagawa-ken 210-8572 / JP
[N/P]
Former [1983/10]For all designated states
KABUSHIKI KAISHA TOSHIBA
72, Horikawa-cho, Saiwai-ku
Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP
Inventor(s)01 / Shibata, Kenji
575 Kamihirama
Nakahara-ku Kawasaki-shi / JP
02 / Inoue, Tomoyasu
2-2-8-504, Atago
Tama-shi Tokyo / JP
[1983/10]
Representative(s)Lehn, Werner , et al
Hoffmann Eitle, Patent- und Rechtsanwälte, Postfach 81 04 20
81904 München / DE
[N/P]
Former [1983/10]Lehn, Werner, Dipl.-Ing. , et al
Hoffmann, Eitle & Partner, Patentanwälte, Postfach 81 04 20
D-81904 München / DE
Application number, filing date82107961.330.08.1982
[1983/10]
Priority number, dateJP1981013542031.08.1981         Original published format: JP 13542081
[1983/10]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0073509
Date:09.03.1983
Language:EN
[1983/10]
Type: A3 Search report 
No.:EP0073509
Date:03.04.1985
Language:EN
[1985/14]
Type: B1 Patent specification 
No.:EP0073509
Date:03.08.1988
Language:EN
[1988/31]
Search report(s)(Supplementary) European search report - dispatched on:EP28.01.1985
ClassificationInternational:H01L27/06
[1983/10]
Designated contracting statesDE,   FR,   GB,   IT [1983/10]
TitleGerman:Integrierte Halbleiterschaltungsvorrichtung[1983/10]
English:Semiconductor integrated circuit device[1983/10]
French:Dispositif à circuit intégré semi-conducteur[1983/10]
Examination procedure30.08.1982Examination requested  [1983/10]
01.09.1986Despatch of a communication from the examining division (Time limit: M06)
02.03.1987Reply to a communication from the examining division
14.10.1987Despatch of communication of intention to grant (Approval: Yes)
08.02.1988Communication of intention to grant the patent
26.04.1988Fee for grant paid
26.04.1988Fee for publishing/printing paid
Opposition(s)04.05.1989No opposition filed within time limit [1989/31]
Fees paidRenewal fee
30.08.1984Renewal fee patent year 03
13.08.1985Renewal fee patent year 04
14.08.1986Renewal fee patent year 05
12.08.1987Renewal fee patent year 06
Documents cited:Search[A]CA930477  ;
 [A]EP0020135  ;
 [A]US4041518
 [A]  - JAPANESE JOURNAL OF APPLIED PHYSICS, vol. 19, no. 1, January 1980, pages 223-226, Tokyo, JP; M. TAMURA et al.: "Si bridging epitaxy from Si windows onto SiO2 by Q-switched ruby laser pulse annealing"