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Extract from the Register of European Patents

EP About this file: EP0471310

EP0471310 - MOS-type semiconductor integrated circuit device [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  30.09.2005
Database last updated on 11.11.2024
Most recent event   Tooltip23.06.2006Lapse of the patent in a contracting state
New state(s): FR
published on 26.07.2006  [2006/30]
Applicant(s)For all designated states
NEC Electronics Corporation
1753 Shimonumabe Nakahara-ku
Kawasaki, Kanagawa 211-8668 / JP
[N/P]
Former [2003/19]For all designated states
NEC Electronics Corporation
1753 Shimonumabe, Nakahara-ku
Kawasaki, Kanagawa 211-8668 / JP
Former [1992/08]For all designated states
NEC CORPORATION
7-1, Shiba 5-chome Minato-ku
Tokyo / JP
Inventor(s)01 / Ooka, Hideyuki, c/o NEC Corporation
7-1, Shiba 5-chome
Minato-ku, Tokyo / JP
[1992/08]
Representative(s)Betten & Resch
Patent- und Rechtsanwälte PartGmbB
Postfach 10 02 51
80076 München / DE
[N/P]
Former [1992/08]Betten & Resch
Reichenbachstrasse 19
D-80469 München / DE
Application number, filing date91113424.509.08.1991
[1992/08]
Priority number, dateJP1990021110909.08.1990         Original published format: JP 21110990
JP1990022868829.08.1990         Original published format: JP 22868890
[1992/08]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP0471310
Date:19.02.1992
Language:EN
[1992/08]
Type: B1 Patent specification 
No.:EP0471310
Date:24.11.2004
Language:EN
[2004/48]
Search report(s)(Supplementary) European search report - dispatched on:EP18.12.1991
ClassificationIPC:H01L27/088, H01L27/02, H01L21/768
[2004/01]
CPC:
H01L27/0266 (EP,US); H01L23/53257 (EP,US); H01L27/088 (EP,US);
H01L29/41725 (EP,US); H01L29/456 (EP,US); H01L29/78 (EP,US);
H01L2924/0002 (EP,US) (-)
C-Set:
H01L2924/0002, H01L2924/00 (EP,US)
Former IPC [1992/08]H01L27/088, H01L27/02, H01L21/90
Designated contracting statesDE,   FR,   GB [1992/08]
TitleGerman:Integriertes Halbleiter-Schaltkreisbauelement vom MOS-Typ[1992/08]
English:MOS-type semiconductor integrated circuit device[1992/08]
French:Dispositif de circuit intégré a semi-conducteur du type MOS[1992/08]
MiscellaneousEPB 2004/46: (deleted)
EPB 2004/46: (deleted)
EPB 2004/46: (deleted)
EPB 1995/14: Teilanmeldung 95100770.7 eingereicht am 09/08/91
EPB 1995/14: Divisional application 95100770.7 filed on 09/08/91
EPB 1995/14: Demande divisionnaire 95100770.7 déposée le 09/08/91
Examination procedure09.09.1991Examination requested  [1992/08]
07.07.1994Despatch of a communication from the examining division (Time limit: M06)
13.01.1995Reply to a communication from the examining division
01.03.1995Despatch of a communication from the examining division (Time limit: M04)
03.07.1995Reply to a communication from the examining division
14.10.1996Despatch of a communication from the examining division (Time limit: M06)
24.04.1997Reply to a communication from the examining division
03.03.1998Date of oral proceedings
16.09.1998Despatch of communication that the application is refused, reason: substantive examination {1}
16.09.1998Minutes of oral proceedings despatched
18.11.2003Communication of intention to grant the patent
05.03.2004Fee for grant paid
05.03.2004Fee for publishing/printing paid
Appeal following examination26.11.1998Appeal received No.  T0320/99
12.01.1999Statement of grounds filed
26.09.2002Result of appeal procedure: remittal for grant
Divisional application(s)EP95100770.7  / EP0654830
Opposition(s)25.08.2005No opposition filed within time limit [2005/46]
Fees paidRenewal fee
27.08.1993Renewal fee patent year 03
29.08.1994Renewal fee patent year 04
29.08.1995Renewal fee patent year 05
29.08.1996Renewal fee patent year 06
27.08.1997Renewal fee patent year 07
28.08.1998Renewal fee patent year 08
31.08.1999Renewal fee patent year 09
31.08.2000Renewal fee patent year 10
31.08.2001Renewal fee patent year 11
02.09.2002Renewal fee patent year 12
29.08.2003Renewal fee patent year 13
31.08.2004Renewal fee patent year 14
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Lapses during opposition  TooltipFR24.11.2004
DE25.02.2005
[2006/30]
Former [2006/13]DE25.02.2005
Documents cited:Search[Y]JP61207051  ;
 [A]US4587718  (HAKEN ROGER A [US], et al);
 [Y]US4657628  (HOLLOWAY THOMAS C [US], et al)
 [Y]  - PATENT ABSTRACTS OF JAPAN vol. 11, no. 41 (E-478)(2488), 6 February 1987; & JP - A - 61207051 (NEC) 13.09.1986, & JP61207051 A 19870206
 [AD]  - IEDM December 1986, pages 484-487, Los Angeles, US; K.-L. CHEN et al.: "Electrostatic Discharge Protectioon for One Micron CMOS Devices and Circuits"
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.