Extract from the Register of European Patents

About this file: EP0708980

EP0708980 - Method of fabricating an electronic device on a silicon on insulator wafer [Right-click to bookmark this link]
Former [1996/18]HIGH-FREQUENCY WIRELESS COMMUNICATION SYSTEM ON A SINGLE ULTRATHIN SILICON ON SAPPHIRE CHIP
[1999/15]
StatusNo opposition filed within time limit
Status updated on  17.11.2000
Database last updated on 27.01.2020
Most recent event   Tooltip28.12.2007Lapse of the patent in a contracting state
New state(s): IT
published on 30.01.2008  [2008/05]
Applicant(s)For all designated states
PEREGRINE SEMICONDUCTOR CORPORATION
6175 Nancy Ridge Drive
San Diego, CA 92121 / US
[1999/34]
Former [1996/18]For all designated states
PEREGRINE SEMICONDUCTOR CORPORATION
Suite A, 2909 Canon Street
San Diego, CA 92106 / US
Inventor(s)01 / REEDY, Ronald, E.
440 San Antonio Avenue Nr. 12
San Diego, CA 92106 / US
02 / BURGENER, Mark, L.
4604 Brighton Street
San Diego, CA 92107 / US
[1996/18]
Representative(s)Maury, Richard Philip , et al
Scott & York
Intellectual Property Ltd
45 Grosvenor Road
St. Albans
Hertfordshire, AL1 3AW / GB
[N/P]
Former [1996/18]Maury, Richard Philip , et al
Sommerville & Rushton, 45 Grosvenor Road
St. Albans, Herts AL1 3AW / GB
Application number, filing date94920168.510.06.1994
[1996/18]
WO1994US06626
Priority number, dateUS1993009040012.07.1993         Original published format: US 90400
US1994021856125.03.1994         Original published format: US 218561
[1996/18]
Filing languageEN
Procedural languageEN
PublicationType: A1  Application with search report
No.:WO9502892
Date:26.01.1995
Language:EN
[1995/05]
Type: A1 Application with search report 
No.:EP0708980
Date:01.05.1996
Language:EN
The application has been published by WIPO in one of the EPO official languages on 26.01.1995
[1996/18]
Type: B1 Patent specification 
No.:EP0708980
Date:19.01.2000
Language:EN
[2000/03]
Search report(s)International search report - published on:EP26.01.1995
ClassificationInternational:H01L21/20, H01L29/78
[1996/18]
Designated contracting statesAT,   BE,   CH,   DE,   DK,   ES,   FR,   GB,   GR,   IE,   IT,   LI,   LU,   MC,   NL,   PT,   SE [1996/18]
TitleGerman:Verfahren zur Herstellung eines elektronischen Bauelements auf einem SOI Wafer[1999/15]
English:Method of fabricating an electronic device on a silicon on insulator wafer[1999/15]
French:Procédé de fabrication d'un dispositif electronique sur une plaquette SOI[1999/15]
Former [1996/18]DRAHTLOSES HOCHFREQUENZ KOMMUNIKATIONSSYSTEM AUF EINEM SOI CHIP
Former [1996/18]HIGH-FREQUENCY WIRELESS COMMUNICATION SYSTEM ON A SINGLE ULTRATHIN SILICON ON SAPPHIRE CHIP
Former [1996/18]SYSTEME DE COMMUNICATIONS SANS FIL A HAUTE FREQUENCE SUR UNE MICROPLAQUETTE ULTRAMINCE EN SILICIUM SUR SAPHIR
Entry into regional phase02.01.1996National basic fee paid 
02.01.1996Designation fee(s) paid 
02.01.1996Examination fee paid 
Examination procedure28.01.1995Request for preliminary examination filed
International Preliminary Examining Authority: EP
02.01.1996Examination requested  [1996/18]
11.11.1997Despatch of a communication from the examining division (Time limit: M06)
12.05.1998Reply to a communication from the examining division
27.04.1999Despatch of communication of intention to grant (Approval: Yes)
16.07.1999Communication of intention to grant the patent
15.10.1999Fee for grant paid
15.10.1999Fee for publishing/printing paid
Opposition(s)20.10.2000No opposition filed within time limit [2001/01]
Fees paidRenewal fee
10.06.1996Renewal fee patent year 03
10.06.1997Renewal fee patent year 04
15.06.1998Renewal fee patent year 05
14.06.1999Renewal fee patent year 06
Lapses during opposition  TooltipAT19.01.2000
BE19.01.2000
CH19.01.2000
ES19.01.2000
FR19.01.2000
GR19.01.2000
IT19.01.2000
LI19.01.2000
NL19.01.2000
SE19.01.2000
DK19.04.2000
PT19.04.2000
DE20.04.2000
LU10.06.2000
IE12.06.2000
MC30.06.2000
[2008/05]
Former [2006/14]AT19.01.2000
BE19.01.2000
CH19.01.2000
ES19.01.2000
FR19.01.2000
GR19.01.2000
LI19.01.2000
NL19.01.2000
SE19.01.2000
DK19.04.2000
PT19.04.2000
DE20.04.2000
LU10.06.2000
IE12.06.2000
MC30.06.2000
Former [2005/23]AT19.01.2000
BE19.01.2000
CH19.01.2000
ES19.01.2000
GR19.01.2000
LI19.01.2000
NL19.01.2000
SE19.01.2000
DK19.04.2000
PT19.04.2000
DE20.04.2000
LU10.06.2000
IE12.06.2000
FR16.06.2000
MC30.06.2000
Former [2004/07]AT19.01.2000
BE19.01.2000
CH19.01.2000
ES19.01.2000
GR19.01.2000
LI19.01.2000
NL19.01.2000
SE19.01.2000
DK19.04.2000
PT19.04.2000
DE20.04.2000
IE12.06.2000
FR16.06.2000
MC30.06.2000
Former [2003/45]AT19.01.2000
BE19.01.2000
CH19.01.2000
ES19.01.2000
LI19.01.2000
NL19.01.2000
SE19.01.2000
DK19.04.2000
PT19.04.2000
DE20.04.2000
IE12.06.2000
FR16.06.2000
MC30.06.2000
Former [2003/08]AT19.01.2000
BE19.01.2000
CH19.01.2000
ES19.01.2000
LI19.01.2000
NL19.01.2000
SE19.01.2000
PT19.04.2000
DE20.04.2000
IE12.06.2000
FR16.06.2000
MC30.06.2000
Former [2002/42]AT19.01.2000
BE19.01.2000
CH19.01.2000
ES19.01.2000
LI19.01.2000
SE19.01.2000
PT19.04.2000
DE20.04.2000
IE12.06.2000
FR16.06.2000
MC30.06.2000
Former [2002/26]AT19.01.2000
BE19.01.2000
CH19.01.2000
ES19.01.2000
LI19.01.2000
SE19.01.2000
PT19.04.2000
DE20.04.2000
IE12.06.2000
FR16.06.2000
Former [2002/23]AT19.01.2000
BE19.01.2000
CH19.01.2000
LI19.01.2000
SE19.01.2000
PT19.04.2000
DE20.04.2000
IE12.06.2000
FR16.06.2000
Former [2002/11]AT19.01.2000
BE19.01.2000
CH19.01.2000
LI19.01.2000
PT19.04.2000
DE20.04.2000
IE12.06.2000
FR16.06.2000
Former [2001/50]AT19.01.2000
BE19.01.2000
CH19.01.2000
LI19.01.2000
PT19.04.2000
IE12.06.2000
FR16.06.2000
Former [2001/09]AT19.01.2000
BE19.01.2000
CH19.01.2000
LI19.01.2000
PT19.04.2000
FR16.06.2000
Former [2001/08]AT19.01.2000
BE19.01.2000
CH19.01.2000
LI19.01.2000
Former [2000/52]CH19.01.2000
LI19.01.2000
Former [2000/50]CH25.04.2000
LI25.04.2000
Cited inInternational search[DX]US4385937  (OHMURA) [DX] 43-46 * column 3, line 6 - column 4, line 47; figures 1A-1D *;
 [DX]US4509990  (VASUDEV) [DX] 43-46,49-52,56-63,73-75 * column 9, line 3 - column 11, line 52 *;
 [DY]US4418470  (NASTER ET AL) [DY] 6-11,14,15,18-20,25-31,38 * column W *;
 [Y]WO8907367  (HUGHES AIRCRAFT COMPANY) [Y] 32-35,41 * the whole document *;
 [Y]US4607176  (BURROWS) [Y] 12,13,15,16 * column W *;
 [A]JPS62176145  ;
 [A]JPH04122020  ;
 [A]JPS61103530
 [DXY]  - G. A. GARCIA ET AL, "High-Quality CMOS in Thin (100nm) Silicon on Sapphire", IEEE ELECTRON DEVICE LETTERS, NEW YORK US, (198801), vol. 9, no. 1, pages 32 - 34 [DX] 1-3,21,22,44-48,51-54,56-59,61-63,65,73-75 * the whole document * [Y] 6-20,25-41
 [XY]  - P. R. DE LA HOUSSAYE ET AL, "Fabrication of n-channel metal-oxide-semiconductor field-effect transistors with 0.2 mum gate lengths in 500 A thin film silicon on sapphire", JOURNAL OF VACUUM SCIENCE AND TECHNOLOGY: PART B NOV./DEC. 1992, NEW YORK US, vol. 10, no. 6, pages 2954 - 2957 [X] 1-5 * the whole document * [Y] 6-20,35-41
 [XA]  - P. H. WOERLEE ET AL, "HALF-MICRON CMOS ON ULTRA-THIN SILICON ON INSULATOR", TECHNICAL DIGEST OF THE INTERNATIONAL ELECTRON DEVICES MEETING 1989, WASHINGTON, D.C. DECEMBER 3-6, 1989, pages 821 - 824 [X] 1,4,23,64-66,70-72 * the whole document * [A] 15,16
 [DX]  - RONALD E. REEDY ET AL, "THIN (100 nm) SOS FOR APPLICATION TO BEYOND VLSI MICROELECTRONICS", MATERIALS RESEARCH SOCIETY SYMPOSIUM PROCEEDINGS, NOVEMBER 30-DECEMBER 3, 1987, BOSTON, MASSACHUSETTS, USA, vol. 107, pages 365 - 376 [DX] 1-5 * the whole document *
 [Y]  - NOBUO SASAKI ET AL, "A CMOS/SOS Synchronus Static RAM Fabricated with an Advanced SOS Technology", JAPANESE JOURNAL OF APPLIED PHYSICS, SUPPLEMENTS 18-1, TOKYO JA, (1979), vol. 18, pages 57 - 62 [Y] 17,36-40 * abstract *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19880119), vol. 12, no. 17, Database accession no. (E - 574), & JP62176145 A 19870801 (SHARP CORP) [A] 1,3 * abstract *
 [A]  - ADELE E. SCHMITZ ET AL, "A Deep-Submicrometer Microwave/Digital CMOS/SOS Technology", IEEE ELECTRON DEVICE LETTERS, NEW YORK US, (199101), vol. 12, no. 1, pages 16 - 17 [A] 6,38,67 * the whole document *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19920814), vol. 16, no. 381, Database accession no. (E - 1248), & JP04122020 A 19920422 (FUJITSU LTD) [A] 55 * abstract *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19860924), vol. 10, no. 280, Database accession no. (C - 374), & JP61103530 A 19860522 (ULVAC CORP) [A] 55 * abstract *
 [A]  - TSU-JAE KING ET AL, "A LOW-TEMPERATURE (<550 C) SILICON-GERMANIUM MOS THIN-FILM TRANSISTOR TECHNOLOGY FOR LARGE-AREA ELECTRONICS", TECHNICAL DIGEST OF THE INTERNATIONAL ELECTRON DEVICES MEETING 1991, WASHINTON, DC DECEMBER 8-11, 1991, pages 567 - 570 [A] 68,69 * figure 7 *
Examination   - APPLIED PHYSICS LETTERS vol.42, no.8, 15 April 1983, pages 707-709