EP0717329 - Circuit arrangement for measuring a time interval [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 12.12.2003 Database last updated on 10.12.2024 | Most recent event Tooltip | 04.01.2008 | Lapse of the patent in a contracting state New state(s): IT | published on 06.02.2008 [2008/06] | Applicant(s) | For all designated states Zarlink Semiconductor Limited Cheney Manor Swindon Wiltshire SN2 2QW / GB | [N/P] |
Former [2003/06] | For all designated states Zarlink Semiconductor Limited Cheney Manor Swindon, Wiltshire SN2 2QW / GB | ||
Former [1998/39] | For all designated states Mitel Semiconductor Limited Cheney Manor Swindon, Wiltshire SN2 2QW / GB | ||
Former [1996/25] | For all designated states PLESSEY SEMICONDUCTORS LIMITED Cheney Manor Swindon, Wiltshire SN2 2QW / GB | Inventor(s) | 01 /
Hunter, Nicholas John Maple Cottage, Blacksmiths Lane Wellingmore, Lincoln LN5 OHP / GB | [1996/25] | Representative(s) | Harding, Richard Patrick, et al Marks & Clerk LLP 4220 Nash Court Oxford Business Park South Oxford OX4 2RU / GB | [N/P] |
Former [2003/06] | Harding, Richard Patrick, et al Marks & Clerk, 4220 Nash Court, Oxford Business Park South Oxford OX4 2RU / GB | ||
Former [1999/13] | Harding, Richard Patrick Marks & Clerk, Nash Court, Oxford Business Park South Oxford OX4 2RU / GB | ||
Former [1996/25] | Hoste, Colin Francis The General Electric Company p.l.c. GEC Patent Department Waterhouse Lane Chelmsford, Essex CM1 2QX / GB | Application number, filing date | 95308546.1 | 28.11.1995 | [1996/25] | Priority number, date | GB19940025431 | 16.12.1994 Original published format: GB 9425431 | [1996/25] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0717329 | Date: | 19.06.1996 | Language: | EN | [1996/25] | Type: | A3 Search report | No.: | EP0717329 | Date: | 17.02.1999 | [1999/07] | Type: | B1 Patent specification | No.: | EP0717329 | Date: | 05.02.2003 | Language: | EN | [2003/06] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 04.01.1999 | Classification | IPC: | G04F10/04 | [1996/25] | CPC: |
G04F10/04 (EP,US)
| Designated contracting states | AT, DE, ES, FR, IT [2002/51] |
Former [1996/25] | AT, DE, ES, FR, GB, IT | Title | German: | Schaltungsvorrichtung zum Messen eines Zeitintervalls | [1996/25] | English: | Circuit arrangement for measuring a time interval | [1996/25] | French: | Circuit disposé pour la mesure d'une intervalle de temps | [1996/25] | Examination procedure | 05.03.1999 | Examination requested [1999/18] | 03.08.1999 | Despatch of a communication from the examining division (Time limit: M06) | 08.02.2000 | Reply to a communication from the examining division | 09.08.2002 | Communication of intention to grant the patent | 22.10.2002 | Fee for grant paid | 22.10.2002 | Fee for publishing/printing paid | Opposition(s) | 06.11.2003 | No opposition filed within time limit [2004/05] | Fees paid | Renewal fee | 19.11.1997 | Renewal fee patent year 03 | 17.11.1998 | Renewal fee patent year 04 | 12.11.1999 | Renewal fee patent year 05 | 13.11.2000 | Renewal fee patent year 06 | 14.11.2001 | Renewal fee patent year 07 | 13.11.2002 | Renewal fee patent year 08 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | AT | 05.02.2003 | IT | 05.02.2003 | ES | 28.08.2003 | [2008/06] |
Former [2004/04] | AT | 05.02.2003 | |
ES | 28.08.2003 | ||
Former [2003/47] | AT | 05.02.2003 | Documents cited: | Search | [A]US4968902 (JACKSON RONALD M [US]) [A] 2 * column 1, line 6 - column 2, line 37 *; | [A]EP0436371 (MOTOROLA INC [US]) [A] 2* column 3, lines 15-38 *; | [DY]EP0508232 (MSC MICROCOMPUTERS SYSTEMS COM [FR]) [DY] 1 * column 1, line 1 - column 3, line 54 *; | [Y]EP0547292 (HEWLETT PACKARD CO [US]) [Y] 1 * column 2, line 53 - column 4, line 8 * | by applicant | EP0300757 | EP0508232 |