EP0764982 - Process for manufacturing an integrated CMOS circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 18.10.2002 Database last updated on 22.02.2019 | Most recent event Tooltip | 18.10.2002 | No opposition filed within time limit | published on 04.12.2002 [2002/49] | Applicant(s) | For all designated states Infineon Technologies AG St.-Martin-Strasse 53 81669 München / DE | [2001/50] |
Former [2001/05] | For all designated states Infineon Technologies AG St.-Martin-Strasse 53 81541 München / DE | ||
Former [1997/13] | For all designated states SIEMENS AKTIENGESELLSCHAFT Wittelsbacherplatz 2 80333 München / DE | Inventor(s) | 01 /
Schwalke, Udo, Dr. Gewerbestr. 22 84431 Heldenstein / DE | [1997/13] | Representative(s) | Zedlitz, Peter
, et al
OSRAM GmbH Intellectual Property IP Postfach 22 13 17 80503 München / DE | [N/P] |
Former [2001/05] | Zedlitz, Peter, Dipl.-Inf.
, et al
Patentanwalt, Postfach 22 13 17 80503 München / DE | Application number, filing date | 96114027.4 | 02.09.1996 | [1997/13] | Priority number, date | DE1995135629 | 25.09.1995 Original published format: DE 19535629 | [1997/13] | Filing language | DE | Procedural language | DE | Publication | Type: | A1 Application with search report | No.: | EP0764982 | Date: | 26.03.1997 | Language: | DE | [1997/13] | Type: | B1 Patent specification | No.: | EP0764982 | Date: | 12.12.2001 | Language: | DE | [2001/50] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 31.01.1997 | Classification | International: | H01L21/8238 | [1997/13] | Designated contracting states | DE, FR, GB, NL [1997/13] | Title | German: | Verfahren zur Herstellung einer integrierten CMOS-Schaltung | [1997/13] | English: | Process for manufacturing an integrated CMOS circuit | [1997/13] | French: | Procédé pour la fabrication d'un circuit CMOS intégré | [1997/13] | Examination procedure | 21.04.1997 | Examination requested [1997/26] | 24.11.2000 | Despatch of communication of intention to grant (Approval: Yes) | 26.02.2001 | Communication of intention to grant the patent | 21.05.2001 | Fee for grant paid | 12.07.2001 | Despatch of communication that the application is deemed to be withdrawn, reason: fee for grant / fee for printing not paid in time | 20.07.2001 | Fee for publishing/printing paid | Opposition(s) | 13.09.2002 | No opposition filed within time limit [2002/49] | Request for further processing for: | 20.07.2001 | Request for further processing filed | 20.07.2001 | Full payment received (date of receipt of payment) Request granted | 03.08.2001 | Decision despatched | Fees paid | Renewal fee | 17.09.1998 | Renewal fee patent year 03 | 17.09.1999 | Renewal fee patent year 04 | 18.09.2000 | Renewal fee patent year 05 | 21.09.2001 | Renewal fee patent year 06 | Documents cited: | Search | [Y]US5438214 (EGAWA YUICHI [JP], et al) [Y] 1,3,5-10 * column 3, line 31 - column 4, line 62; figure - *; | [Y]US4847213 (PFIESTER JAMES R [US]) [Y] 1,5-7,10 * column 2, line 19 - column 5, line 53; figure - *; | [Y]EP0660394 (AT & T CORP [US]) [Y] 1,3,6,10 * the whole document *; | [Y]USRE34158E (A. WATANABE ET AL) [Y] 8 * figure - *; | [Y]DE4110645 (MITSUBISHI ELECTRIC CORP [JP]) [Y] 9 * figure - *; | [DA] D. YU ET AL, INTERNATIONAL JOURNAL OF HIGH SPEED ELECTRONICS AND SYSTEMS, (1994), vol. 5, no. 2, pages 135 - 143, XP000195617 [DA] 8 * the whole document * DOI: http://dx.doi.org/10.1142/S0129156494000073 |