Extract from the Register of European Patents

About this file: EP0875902

EP0875902 - Enhanced signal processing random access memory device utilizing a DRAM memory array integrated with an associated SRAM cache and internal refresh control [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  15.02.2002
Database last updated on 18.01.2020
Most recent event   Tooltip15.02.2002Withdrawal of applicationpublished on 03.04.2002  [2002/14]
Applicant(s)For all designated states
Enhanced Memory Systems, Inc.
1850 Ramtron Drive Colorado Springs
Colorado 80291 / US
[N/P]
Former [1998/45]For all designated states
Enhanced Memory Systems, Inc.
1850 Ramtron Drive
Colorado Springs, Colorado 80291 / US
Inventor(s)01 / Alwais, Michael
5110 Hopner Court
Colorado Springs, Colorado 80919 / US
02 / Mobley, Kenneth J.
17070 Remington Road
Colorado Springs, Colorado 80908 / US
[1998/45]
Representative(s)Burke, Steven David , et al
R.G.C. Jenkins & Co 26 Caxton Street
London SW1H 0RJ / GB
[N/P]
Former [1998/45]Burke, Steven David , et al
R.G.C. Jenkins & Co. 26 Caxton Street
London SW1H 0RJ / GB
Application number, filing date98303023.020.04.1998
[1998/45]
Priority number, dateUS1997085080202.05.1997         Original published format: US 850802
[1998/45]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0875902
Date:04.11.1998
Language:EN
[1998/45]
Type: A3 Search report 
No.:EP0875902
Date:12.01.2000
[2000/02]
Search report(s)(Supplementary) European search report - dispatched on:EP25.11.1999
ClassificationInternational:G11C11/406
[1998/45]
Designated contracting statesDE,   FR,   GB [2000/38]
Former [1998/45]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Verbesserter Signalverarbeitungsdirektzugriffspeicher mit einer DRAM-Speichermatrize mit einem beigeordneten SRAM-Speicher integrierten sowie interne Auffrischungssteuerung[1998/45]
English:Enhanced signal processing random access memory device utilizing a DRAM memory array integrated with an associated SRAM cache and internal refresh control[1998/45]
French:Mémoire à accès aléatoire de traitement de signal amélioré utilisant un réseau de mémoire DRAM intégré avec une mémoire cache SRAM et commande de rafraichissement[1998/45]
Examination procedure12.06.2000Examination requested  [2000/32]
06.02.2002Application withdrawn by applicant  [2002/14]
Fees paidRenewal fee
13.04.2000Renewal fee patent year 03
12.04.2001Renewal fee patent year 04
Documents cited:Search[X]EP0509811  (MITSUBISHI ELECTRIC ENG ;MITSUBISHI ELECTRIC CORP (JP)) [X] 1,8-14,18,19,21,25 * column 57, line 14 - column 58, line 52 * * column 148, line 1 - column 153, line 26; figure 31 *;
 [A]US4625301  (BERGER MICHAEL F) [A] 2 * abstract *