Extract from the Register of European Patents

About this file: EP0880233

EP0880233 - Extended-trinary coded decimal apparatus and method [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  08.06.2001
Database last updated on 16.06.2018
Most recent event   Tooltip08.06.2001No opposition filed within time limitpublished on 25.07.2001 [2001/30]
Applicant(s)For all designated states
SUN MICROSYSTEMS, INC.
901 San Antonio Road, M/S Palo 1-521
Palo Alto, California 94303 / US
[N/P]
Former [2000/32]For all designated states
SUN MICROSYSTEMS, INC.
901 San Antonio Road, MS PAL1-521
Palo Alto, California 94043 / US
Former [1998/48]For all designated states
SUN MICROSYSTEMS, INC.
901 San Antonio Road, MS PAL01-521
Palo Alto, California 94303 / US
Inventor(s)01 / Garnett, Paul Jeffrey
2 The Rookery, Newton-le-Willows
Merseyside, WA12 9PW / GB
[1998/48]
Representative(s)Harris, Ian Richard , et al
D Young & Co LLP
120 Holborn
London EC1N 2DY / GB
[N/P]
Former [1998/48]Harris, Ian Richard , et al
D. Young & Co., 21 New Fetter Lane
London EC4A 1DA / GB
Application number, filing date98303967.819.05.1998
[1998/48]
Priority number, dateUS1997086213222.05.1997         Original published format: US 862132
[1998/48]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP0880233
Date:25.11.1998
Language:EN
[1998/48]
Type: B1 Patent specification 
No.:EP0880233
Date:09.08.2000
Language:EN
[2000/32]
Search report(s)(Supplementary) European search report - dispatched on:EP28.09.1998
ClassificationInternational:H03M5/00, H04L25/49
[1998/48]
Designated contracting statesDE,   FR,   GB,   IT,   NL,   SE [1999/31]
Former [1998/48]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Vorrichtung und Verfahren mit erweitert-ternär kodiertem Dezimalcode[1998/48]
English:Extended-trinary coded decimal apparatus and method[1998/48]
French:Appareil et méthode utilisant une base décimale codée par un code ternaire augmenté[1998/48]
Examination procedure30.03.1999Examination requested  [1999/23]
12.05.1999Despatch of a communication from the examining division (Time limit: M04)
27.08.1999Reply to a communication from the examining division
11.10.1999Despatch of communication of intention to grant (Approval: Yes)
15.02.2000Communication of intention to grant the patent
17.03.2000Fee for grant paid
17.03.2000Fee for publishing/printing paid
Opposition(s)10.05.2001No opposition filed within time limit [2001/30]
Fees paidRenewal fee
04.05.2000Renewal fee patent year 03
Documents cited:Search[A]JPS61247123
 [A]  - SHIVASHANKAR H N ET AL, "Ternary function and circuit design using ternary multiplexers", INTERNATIONAL JOURNAL OF ELECTRONICS, JAN. 1984, UK, ISSN 0020-7217, vol. 56, no. 1, pages 135 - 150, XP002077235 [A] 1-20 * page 149, paragraph 8.2 *
 [A]  - WALKER M, "A new approach to weighted number systems", COMPUTER DESIGN, JULY 1969, USA, ISSN 0010-4566, vol. 8, no. 7, pages 37 - 47, XP002077236 [A] 1-20 * page 44, column L, line 28 - column R, line 10 *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19870325), vol. 011, no. 095, Database accession no. (E - 492), [A] 1-20 * abstract *