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Extract from the Register of European Patents

EP About this file: EP0936666

EP0936666 - Method of reducing metal voids in semiconductor device interconnection [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  04.12.2009
Database last updated on 23.04.2024
Most recent event   Tooltip04.12.2009Application deemed to be withdrawnpublished on 06.01.2010  [2010/01]
Applicant(s)For all designated states
International Business Machines Corporation
Armonk, NY 10504 / US
[N/P]
Former [1999/33]For all designated states
INTERNATIONAL BUSINESS MACHINES CORPORATION
Armonk, NY 10504 / US
Inventor(s)01 / Naeem, Munir-ud-Din
4 Ruby Circle, Crystal Glen
Poughkeepsie, New York 12603-1037 / US
[1999/33]
Representative(s)Burt, Roger James, et al
IBM United Kingdom Limited Intellectual Property Department Hursley Park Winchester
Hampshire SO21 2JN / GB
[N/P]
Former [1999/37]Burt, Roger James, Dr., et al
IBM United Kingdom Limited Intellectual Property Department Hursley Park
Winchester Hampshire SO21 2JN / GB
Former [1999/33]Burrington, Alan Graham Headford
Alan Burrington & Associates 41 The Street Ashtead
Surrey KT21 1AA / GB
Application number, filing date98310521.421.12.1998
[1999/33]
Priority number, dateUS1998000310206.01.1998         Original published format: US 3102
[1999/33]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0936666
Date:18.08.1999
Language:EN
[1999/33]
Type: A3 Search report 
No.:EP0936666
Date:21.05.2003
[2003/21]
Search report(s)(Supplementary) European search report - dispatched on:EP09.04.2003
ClassificationIPC:H01L21/768, H01L21/3213
[2003/21]
CPC:
H01L21/32136 (EP,US); H01L21/76838 (EP,US)
Former IPC [1999/33]H01L21/768
Designated contracting statesDE,   FR,   GB,   IE [2004/07]
Former [1999/33]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Methode zur Reduzierung von Hohlräumen in metallischen Halbleiterzwischenverbindungen[1999/33]
English:Method of reducing metal voids in semiconductor device interconnection[1999/33]
French:Méthode de réduction de bulles d'une interconnexion métallique[1999/33]
Examination procedure21.06.2003Examination requested  [2003/35]
02.12.2003Loss of particular rights, legal effect: designated state(s)
18.03.2004Despatch of communication of loss of particular rights: designated state(s) AT, BE, CH, CY, DK, ES, FI, GR, IT, LU, MC, NL, PT, SE
31.10.2006Despatch of a communication from the examining division (Time limit: M06)
09.05.2007Reply to a communication from the examining division
01.07.2009Application deemed to be withdrawn, date of legal effect  [2010/01]
07.08.2009Despatch of communication that the application is deemed to be withdrawn, reason: renewal fee not paid in time  [2010/01]
Fees paidRenewal fee
13.12.2000Renewal fee patent year 03
13.12.2001Renewal fee patent year 04
12.12.2002Renewal fee patent year 05
15.12.2003Renewal fee patent year 06
15.12.2004Renewal fee patent year 07
16.12.2005Renewal fee patent year 08
19.12.2006Renewal fee patent year 09
17.12.2007Renewal fee patent year 10
Penalty fee
Penalty fee Rule 85a EPC 1973
02.01.2004AT   M01   Not yet paid
02.01.2004BE   M01   Not yet paid
02.01.2004CH   M01   Not yet paid
02.01.2004CY   M01   Not yet paid
02.01.2004DK   M01   Not yet paid
02.01.2004ES   M01   Not yet paid
02.01.2004FI   M01   Not yet paid
02.01.2004GB   M01   Not yet paid
02.01.2004IT   M01   Not yet paid
02.01.2004LU   M01   Not yet paid
02.01.2004MC   M01   Not yet paid
02.01.2004NL   M01   Not yet paid
02.01.2004PT   M01   Not yet paid
02.01.2004SE   M01   Not yet paid
Additional fee for renewal fee
31.12.200811   M06   Not yet paid
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[X]DE3842758  (SIEMENS AG [DE]) [X] 1,2,5 * the whole document *;
 [X]TW291587B  ;
 [E]US5952244  (ABRAHAM SUSAN C [US], et al) [E] * the whole document *;
 [YA]US5387556  (MA XIAOBING DIANA [US], et al) [Y] 1,2 * the whole document * [A] 3,5;
 [Y]US5350488  (WEBB ELAINE A [US]) [Y] 1,2 * the whole document *;
 [X]EP0788147  (APPLIED MATERIALS INC [US]) [X] 8-10 * column 11, line 46 - line 50; figure 1 *;
 [X]US5304775  (FUJIWARA NOBUO [JP], et al) [X] 8-10 * figure 4 *;
 [A]WO9730472  (LAM RES CORP [US]) [A] 1,3 * the whole document *;
 [A]WO9736322  (LAM RES CORP [US]) [A] 1-3,5 * the whole document *;
 [A]US5167760  (MU XIAO-CHUN [US], et al) [A] 1 * the whole document *;
 [A]GB2098931  (WESTERN ELECTRIC CO [US]) [A] 1 * abstract *;
 [PA]WO9828785  (LAM RES CORP [US]) [PA] 1-3,5 * the whole document *
 [X]  - DATABASE WPI, 1, Derwent World Patents Index, vol. 1997, no. 12, Database accession no. 1997-131232, XP002236434 & TW291587B B 19961121 (LAM RES CORP) [X] 1,3 * abstract *
 [A]  - TERUO SUZUKI ET AL, "RESIDUE FORMATION AND ELIMINATION IN CHLORINE-BASED PLASMA ETCHING OF AL-SI-CU INTERCONNECTIONS", JOURNAL OF VACUUM SCIENCE AND TECHNOLOGY: PART B, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, (19920301), vol. 10, no. 2, ISSN 0734-211X, pages 596 - 600, XP000277867 [A] 1 * page 597 *

DOI:   http://dx.doi.org/10.1116/1.586419
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