Extract from the Register of European Patents

About this file: EP0971292

EP0971292 - Method and apparatus for transferring data over a processor interface bus [Right-click to bookmark this link]
StatusThe application has been refused
Status updated on  30.03.2007
Database last updated on 22.03.2019
Most recent event   Tooltip05.06.2009Change - representativepublished on 08.07.2009  [2009/28]
Applicant(s)For all designated states
Freescale Semiconductor, Inc.
6501 William Cannon Drive West
Austin, TX 78735 / US
[N/P]
Former [2004/50]For all designated states
Freescale Semiconductor, Inc.
6501 William Cannon Drive West
Austin, Texas 78735 / US
Former [2000/02]For all designated states
MOTOROLA, INC.
1303 East Algonquin Road
Schaumburg, IL 60196 / US
Inventor(s)01 / Todd, David William
6203 Back Bay Lane
Austin, Texas 78739 / US
02 / Snyder, Michael Dean
12407 Audane Drive
Austin, Texas 78727 / US
03 / Reynolds, Brian Keith
8710 Bobcat Drive
Round Rock, Texas 78681 / US
04 / Garcia, Michael Julio
5803 Kayview Drive
Austin, Texas 78749 / US
[2000/04]
Former [2000/02]01 / Todd, David William
6203 Back Bay Lane
Austin, Texas 78739 / US
02 / Snyder, Michael Dean
3401 Parmer Lane West 1718
Austin, Texas 78727 / US
03 / Reynolds, Brian Keith
8710 Bobcat Drive
Round Rock, Texas 78681 / US
04 / Garcia, Michael Julio
5803 Kayview Drive
Austin, Texas 78749 / US
Representative(s)Wray, Antony John
Optimus Patents Limited
Peak Hill House
Steventon
Basingstoke, Hampshire RG25 3AZ / GB
[N/P]
Former [2009/28]Wray, Antony John
Optimus The Strategic Patent Service Grove House Lutyens Close Chineham Court Basingstoke
Hampshire RG24 8AG / GB
Former [2006/35]Wray, Antony John
Optimus, Grove House, Lutyens Close, Chineham Court
Basingstoke, Hants RG24 8AG / GB
Former [2004/27]Wharmby, Martin Angus
Freescale Semiconductor Inc. c/o Impetus IP Limited Grove House Lutyens Close
Basingstoke, Hampshire RG24 8AG / GB
Former [2000/02]Gibson, Sarah Jane
Motorola European Intellectual Property Operations Midpoint Alencon Link
Basingstoke, Hampshire RG21 7PL / GB
Application number, filing date99112450.430.06.1999
[2000/02]
Priority number, dateUS1998011035106.07.1998         Original published format: US 110351
[2000/02]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0971292
Date:12.01.2000
Language:EN
[2000/02]
Type: A3 Search report 
No.:EP0971292
Date:22.11.2000
[2000/47]
Search report(s)(Supplementary) European search report - dispatched on:EP06.10.2000
ClassificationInternational:G06F12/08
[2000/02]
Designated contracting statesDE,   FR,   GB,   IT [2001/32]
Former [2000/02]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Verfahren und Vorrichtung zur Übertragung von Daten über einen Prozessorschnittstellenbus[2000/02]
English:Method and apparatus for transferring data over a processor interface bus[2000/02]
French:Procédé et dispositif de transfers de données sur un bus d'interface de processeur[2000/02]
Examination procedure22.05.2001Examination requested  [2001/29]
21.06.2002Despatch of a communication from the examining division (Time limit: M06)
13.12.2002Reply to a communication from the examining division
01.04.2005Despatch of a communication from the examining division (Time limit: M04)
09.08.2005Reply to a communication from the examining division
12.09.2006Cancellation of oral proceeding that was planned for 21.09.2006
12.09.2006Minutes of oral proceedings despatched
21.09.2006Despatch of communication that the application is refused, reason: substantive examination [2007/18]
21.09.2006Date of oral proceedings (cancelled)
03.10.2006Application refused, date of legal effect [2007/18]
Fees paidRenewal fee
05.06.2001Renewal fee patent year 03
07.06.2002Renewal fee patent year 04
04.06.2003Renewal fee patent year 05
04.06.2004Renewal fee patent year 06
06.06.2005Renewal fee patent year 07
27.03.2006Renewal fee patent year 08
Documents cited:Search[XA]  ARCHIBALD J ET AL, "CACHE COHERENCE PROTOCOLS: EVALUATION USING A MULTIPROCESSOR SIMULATION MODEL", ACM TRANSACTIONS ON COMPUTER SYSTEMS,US,ASSOCIATION FOR COMPUTING MACHINERY. NEW YORK, (19861101), vol. 4, no. 4, ISSN 0734-2071, pages 273 - 298, XP000050940 [X] 1-4,8-10 * page 274, paragraph 2 - page 275, line 11 * * page 278, lines 3-5 * * page 278, paragraph 2.4 - page 279, line 14 * [A] 5

DOI:   http://dx.doi.org/10.1145/6513.6514