Extract from the Register of European Patents

About this file: EP0986064

EP0986064 - Integrated semiconductor memory [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  20.10.2006
Database last updated on 18.03.2019
Most recent event   Tooltip20.10.2006No opposition filed within time limitpublished on 22.11.2006  [2006/47]
Applicant(s)For all designated states
Infineon Technologies AG
St.-Martin-Strasse 53
81669 München / DE
[2005/50]
Former [2003/46]For all designated states
Infineon Technologies AG
St.-Martin-Strasse 53
81669 München / DE
Former [2000/11]For all designated states
SIEMENS AKTIENGESELLSCHAFT
Wittelsbacherplatz 2
80333 München / DE
Inventor(s)01 / Le, Thoai-Thai
Ottobrunner Str. 43
81737 München / DE
02 / Brox, Martin, Dr.
Zehntfeldstr. 111
81825 München / DE
03 / Lindolf, Jürgen, Dr.
Eppaner Str. 20
86316 Friedberg / DE
04 / Brass, Eckhard, Dr.
Adejeweg 20
82008 Unterhaching / DE
[2000/11]
Representative(s)Patentanwaltskanzlei WILHELM & BECK
Prinzenstraße 13
80639 München / DE
[N/P]
Former [2001/10]Patentanwaltskanzlei WILHELM & BECK
Nymphenburger Strasse 139
80636 München / DE
Application number, filing date99116795.801.09.1999
[2000/11]
Priority number, dateDE199814098308.09.1998         Original published format: DE 19840983
[2000/11]
Filing languageDE
Procedural languageDE
PublicationType: A2 Application without search report 
No.:EP0986064
Date:15.03.2000
Language:DE
[2000/11]
Type: A3 Search report 
No.:EP0986064
Date:27.12.2000
[2000/52]
Type: B1 Patent specification 
No.:EP0986064
Date:14.12.2005
Language:DE
[2005/50]
Search report(s)(Supplementary) European search report - dispatched on:EP15.11.2000
ClassificationInternational:G11C8/00, G11C5/14
[2000/11]
Designated contracting statesDE,   FR,   GB,   IE,   IT [2001/37]
Former [2000/11]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Integrierter Halbleiterspeicher[2000/11]
English:Integrated semiconductor memory[2000/11]
French:Mémoire à semiconducteurs intégrée[2000/11]
Examination procedure13.01.2001Examination requested  [2001/11]
29.06.2005Communication of intention to grant the patent
13.08.2005Fee for grant paid
13.08.2005Fee for publishing/printing paid
Opposition(s)15.09.2006No opposition filed within time limit [2006/47]
Fees paidRenewal fee
13.09.2001Renewal fee patent year 03
12.09.2002Renewal fee patent year 04
02.09.2003Renewal fee patent year 05
02.09.2004Renewal fee patent year 06
06.09.2005Renewal fee patent year 07
Documents cited:Search[X]US5659519  (LEE HYUN-SEOK [KR], et al) [X] 1,9 * column 3, line 64 - column 4, line 40; figure 3 *;
 [A]US5615162  (HOUSTON THEODORE W [US]) [A] 1 * abstract *;
 [A]US5251178  (CHILDERS JIMMIE D [US]) [A] 1 * abstract *;
 [A]DE19639701  (SIEMENS AG [DE]) [A] 3 * abstract *;
 [PX]EP0871178  (MOTOROLA INC [US]) [PX] 1 * abstract *;
 [E]US6031780  (ABE HIROHISA [JP]) [E] 1 * abstract *