Extract from the Register of European Patents

About this file: EP0971538

EP0971538 - Inverse transport processor with memory address circuitry [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  03.10.2003
Database last updated on 23.01.2020
Most recent event   Tooltip15.08.2008Change - representativepublished on 17.09.2008  [2008/38]
Applicant(s)For all designated states
THOMSON CONSUMER ELECTRONICS, INC.
10333 North Meridian Street
Indianapolis, IN 46290-1024 / US
[N/P]
Former [2000/02]For all designated states
THOMSON CONSUMER ELECTRONICS, INC.
10330 North Meridian St
Indianapolis, IN 46290-1024 / US
Inventor(s)01 / Bridgewater, Kevin Elliot
THOMSON Multimedia, 46, Quai Alphonse Le Gallo
92100 Boulogne-Billancourt / FR
02 / Deiss, Michael Scott
THOMSON Multimedia, 46, Quai Alphonse Le Gallo
92100 Boulogne-Billancourt / FR
[2000/02]
Representative(s)Ruellan-Lemonnier, Brigitte , et al
Technicolor
European Patent Operations
1-5 Rue Jeanne d'Arc
92443 Issy-les-Moulineaux Cedex / FR
[N/P]
Former [2008/38]Ruellan-Lemonnier, Brigitte , et al
Thomson multimedia Patent Department 46 Quai A. Le Gallo
92648 Boulogne Cedex / FR
Former [2000/02]Ruellan-Lemonnier, Brigitte , et al
THOMSON multimedia, Licensing and Intellectual Property, 46 Quai Alphonse Le Gallo
92100 Boulogne Billancourt / FR
Application number, filing date99120648.312.04.1995
[2000/02]
Priority number, dateUS1994023278722.04.1994         Original published format: US 232787
US1994023278922.04.1994         Original published format: US 232789
[2000/02]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0971538
Date:12.01.2000
Language:EN
[2000/02]
Type: A3 Search report 
No.:EP0971538
Date:19.07.2000
[2000/29]
Type: B1 Patent specification 
No.:EP0971538
Date:27.11.2002
Language:EN
[2002/48]
Search report(s)(Supplementary) European search report - dispatched on:EP07.06.2000
ClassificationInternational:H04N7/16, H04N7/167
[2000/02]
Designated contracting statesDE,   ES,   FR,   GB,   IT,   PT [2000/02]
TitleGerman:Prozessor für inverse Übertragung mit Speicheradressenschaltung[2000/02]
English:Inverse transport processor with memory address circuitry[2000/02]
French:Processeur de transfert inverse avec un circuit d'adressage de mémoire[2000/02]
Examination procedure18.10.1999Examination requested  [2000/02]
11.07.2001Despatch of a communication from the examining division (Time limit: M06)
28.12.2001Reply to a communication from the examining division
04.03.2002Despatch of communication of intention to grant (Approval: Yes)
19.06.2002Communication of intention to grant the patent
06.09.2002Fee for grant paid
06.09.2002Fee for publishing/printing paid
Parent application(s)   TooltipEP95105541.7  / EP0679028
Opposition(s)28.08.2003No opposition filed within time limit [2003/47]
Fees paidRenewal fee
18.10.1999Renewal fee patent year 03
18.10.1999Renewal fee patent year 04
18.10.1999Renewal fee patent year 05
20.12.1999Renewal fee patent year 06
21.04.2001Renewal fee patent year 07
24.04.2002Renewal fee patent year 08
Documents cited:Search[PA]WO9414284  (DISCOVERY COMMUNICATIONS INC) [PA] 1-5 * page 4, line 5 - page 6, line 14 * * page 9, line 24 - page 16, line 22 * * page 19, line 10 - page 21, line 26 * * page 24, line 24 - page 29, line 9 * * page 39, line 30 - page 46, line 25 * * figures 2-11 *;
 [A]WO8801463  (SCIENTIFIC ATLANTA) [A] 1-5 * page 7, line 21 - page 12, line 17 * * figures 1-21 *;
 [A]  - D.T. WRIGHT, "CONDITIONAL ACCESS BROADCASTING: DATACARE 2, An Over-Air Enabled System for General Purpose Data Channels", BBC RESEARCH DEPARTMENT REPORT, TADWORTH, SURREY, UK, (198808), pages 1 - 18, XP000577263 [A] 1-5 * the whole document *