Extract from the Register of European Patents

About this file: EP0969513

EP0969513 - Embedded enhanced dram with integrated logic circuit, and associated method [Right-click to bookmark this link]
Former [2000/01]Embedded enhanced DRAM with integrated logic circuit, and associated method
[2000/02]
StatusThe application has been refused
Status updated on  14.10.2011
Database last updated on 24.04.2019
Most recent event   Tooltip14.10.2011Refusal of applicationpublished on 16.11.2011  [2011/46]
Applicant(s)For all designated states
Enhanced Memory Systems, Inc.
1850 Ramtron Drive Colorado Springs
Colorado 80921 / US
[N/P]
Former [2000/01]For all designated states
Enhanced Memory Systems, Inc.
1850 Ramtron Drive
Colorado Springs, Colorado 80921 / US
Inventor(s)01 / Alwais, Michael
5110 Hopner Court
Colorado Springs, CO 80919 / US
02 / Peters, Michael
3020 Blodgett Dr.
Colorado Springs, CO 80919 / US
[2000/01]
Representative(s)Small, Gary James
Carpmaels & Ransford LLP
One Southampton Row
London WC1B 5HA / GB
[N/P]
Former [2010/22]Small, Gary James
Carpmaels & Ransford 43-45 Bloomsbury Square
London WC1A 2RA / GB
Former [2000/01]Burke, Steven David , et al
R.G.C. Jenkins & Co. 26 Caxton Street
London SW1H 0RJ / GB
Application number, filing date99302956.016.04.1999
[2000/01]
Priority number, dateUS1998010808930.06.1998         Original published format: US 108089
[2000/01]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0969513
Date:05.01.2000
Language:EN
[2000/01]
Type: A3 Search report 
No.:EP0969513
Date:24.05.2000
[2000/21]
Search report(s)(Supplementary) European search report - dispatched on:EP06.04.2000
ClassificationInternational:H01L27/06, H01L21/8239, G06F12/08
[2000/21]
Former International [2000/01]H01L27/06, H01L21/8239
Designated contracting statesDE,   FR,   GB,   IT,   NL [2001/05]
Former [2000/01]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Verbesserte DRAM mit integriertem Logik-Schaltkreis, und Verfahren[2000/01]
English:Embedded enhanced dram with integrated logic circuit, and associated method[2000/02]
French:DRAM amélioré avec des circuits logiques intégrés, et procédé[2000/01]
Former [2000/01]Embedded enhanced DRAM with integrated logic circuit, and associated method
Examination procedure20.11.2000Examination requested  [2001/03]
16.07.2001Despatch of a communication from the examining division (Time limit: M04)
15.11.2001Reply to a communication from the examining division
16.11.2005Despatch of a communication from the examining division (Time limit: M06)
16.05.2006Reply to a communication from the examining division
06.11.2007Date of oral proceedings
30.11.2007Despatch of communication that the application is refused, reason: substantive examination [2011/46]
30.11.2007Minutes of oral proceedings despatched
13.09.2011Application refused, date of legal effect [2011/46]
Appeal following examination11.02.2008Appeal received No.  T0979/08
10.04.2008Statement of grounds filed
13.09.2011Result of appeal procedure: appeal of the applicant withdrawn
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is  16.07.2001
Fees paidRenewal fee
12.04.2001Renewal fee patent year 03
12.04.2002Renewal fee patent year 04
14.04.2003Renewal fee patent year 05
28.04.2004Renewal fee patent year 06
20.04.2005Renewal fee patent year 07
26.04.2006Renewal fee patent year 08
10.04.2007Renewal fee patent year 09
18.03.2008Renewal fee patent year 10
07.04.2009Renewal fee patent year 11
15.03.2010Renewal fee patent year 12
06.04.2011Renewal fee patent year 13
Documents cited:Search[A]US5249282  (SEGERS DENNIS L [US]) [A] 1-15 * column 7, line 5 - column 10, line 5; figures 3,5 *;
 [A]EP0468141  (IBM [US]) [A] 1-22 * the whole document *;
 [A]US5566318  (JOSEPH JAMES D [US]) [A] 1-22 * abstract *;
 [A]JPS6381692  ;
 [XA]US5416739  (WONG KENNETH K F [CA]) [X] 16 * column 2, lines 36-63; figure - * [A] 1-15,17-22
 [A]  - PATENT ABSTRACTS OF JAPAN, (19880829), vol. 012, no. 317, Database accession no. (P - 750), [A] 1-22 * abstract *