Extract from the Register of European Patents

About this file: EP0996317

EP0996317 - Structure and method for mounting an electronic circuit unit to a printed board [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  17.10.2003
Database last updated on 20.02.2018
Most recent event   Tooltip17.10.2003No opposition filed within time limitpublished on 03.12.2003  [2003/49]
Applicant(s)For all designated states
ALPS ELECTRIC CO., LTD.
1-7 Yukigaya Otsuka-cho Ota-ku
Tokyo 145 / JP
[N/P]
Former [2000/17]For all designated states
ALPS ELECTRIC CO., LTD.
1-7 Yukigaya Otsuka-cho
Ota-ku Tokyo 145 / JP
Inventor(s)01 / Harada, Hiroshi
12 Aza-hasedo, Nishiyama, Soma-shi
Fukushima-ken / JP
02 / Terashima, Kiminori
126 Aza-terauchi, Babano, Soma-shi
Fukushima-ken / JP
[2000/17]
Representative(s)Kensett, John Hinton
Saunders & Dolleymore LLP 9 Rickmansworth Road Watford
WD18 0JU / GB
[N/P]
Former [2000/17]Kensett, John Hinton
Saunders & Dolleymore, 9 Rickmansworth Road
Watford, Hertfordshire WD1 7HE / GB
Application number, filing date99308017.512.10.1999
[2000/17]
Priority number, dateJP1998029697219.10.1998         Original published format: JP 29697298
[2000/17]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP0996317
Date:26.04.2000
Language:EN
[2000/17]
Type: B1 Patent specification 
No.:EP0996317
Date:11.12.2002
Language:EN
[2002/50]
Search report(s)(Supplementary) European search report - dispatched on:EP15.02.2000
ClassificationInternational:H05K1/11
[2000/17]
Designated contracting statesCH,   DE,   FR,   GB,   LI [2001/02]
Former [2000/17]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Aufbau und Verfahren zum Montieren einer elektronischen Einheit auf eine gedruckte Schaltungsplatte[2000/17]
English:Structure and method for mounting an electronic circuit unit to a printed board[2000/17]
French:Assemblage et méthode pour monter une unité électronique sur une plaquette à circuit imprimé[2000/17]
Examination procedure31.03.2000Examination requested  [2000/22]
06.04.2000Amendment by applicant (claims and/or description)
16.11.2001Despatch of communication of intention to grant (Approval: Yes)
22.03.2002Fee for grant paid
22.03.2002Fee for publishing/printing paid
27.05.2002Communication of intention to grant the patent
Opposition(s)12.09.2003No opposition filed within time limit [2003/49]
Fees paidRenewal fee
31.10.2001Renewal fee patent year 03
10.10.2002Renewal fee patent year 04
Documents cited:Search[X]US5692669  (SAKEMI SHOUZI [JP], et al) [X] 1,3 * column 3, line 18 - line 55; claim 1 *;
 [A]US5303122  (ADAMS JR CLIFFORD G [US], et al) [A] 1-4 * the whole document *;
 [A]US5458907  (ISHIDO KIMINORI [JP]) [A] 1,3 * the whole document *