Extract from the Register of European Patents

About this file: EP1025500

EP1025500 - METHOD AND DEVICE FOR SYSTEM SIMULATION OF MICROCONTROLLERS/MICROPROCESSORS AND CORRESPONDING PERIPHERAL MODULES [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  15.10.2004
Database last updated on 08.12.2017
Most recent event   Tooltip15.10.2004No opposition filed within time limitpublished on 01.12.2004  [2004/49]
Applicant(s)For all designated states
Infineon Technologies AG
St.-Martin-Strasse 53
81669 München / DE
[2003/50]
Former [2000/32]For all designated states
Infineon Technologies AG
St.-Martin-Strasse 53
81541 München / DE
Inventor(s)01 / MAYER, Albrecht
Jägerstrasse 16
D-82041 Deisenhofen / DE
[2000/32]
Representative(s)Jannig, Peter , et al
Jannig & Repkow
Patentanwälte
Klausenberg 20
86199 Augsburg / DE
[N/P]
Former [2001/24]Jannig, Peter, Dipl.-Ing. , et al
Jannig & Repkow, Patentanwälte, Klausenberg 20
86199 Augsburg / DE
Former [2000/32]Zedlitz, Peter, Dipl.-Inf. , et al
Patentanwalt, Postfach 22 13 17
80503 München / DE
Application number, filing date99953691.502.09.1999
[2000/32]
WO1999DE02778
Priority number, dateDE199814003302.09.1998         Original published format: DE 19840033
[2000/32]
Filing languageDE
Procedural languageDE
PublicationType: A1  Application with search report
No.:WO0014639
Date:16.03.2000
Language:DE
[2000/11]
Type: A1 Application with search report 
No.:EP1025500
Date:09.08.2000
Language:DE
The application has been published by WIPO in one of the EPO official languages on 16.03.2000
[2000/32]
Type: B1 Patent specification 
No.:EP1025500
Date:10.12.2003
Language:DE
[2003/50]
Search report(s)International search reportEP16.03.2000
ClassificationInternational:G06F11/26
[2000/32]
Designated contracting statesDE,   FR,   GB,   IT [2000/32]
TitleGerman:VERFAHREN UND VORRICHTUNG ZUR SYSTEMSIMULATION VON MIKROCONTROLLERN/MIKROPROZESSOREN UND ZUGEHÖRENDEN PERIPHERIEMODULEN[2000/32]
English:METHOD AND DEVICE FOR SYSTEM SIMULATION OF MICROCONTROLLERS/MICROPROCESSORS AND CORRESPONDING PERIPHERAL MODULES[2000/32]
French:PROCEDE ET DISPOSITIF POUR LA SIMULATION DE SYSTEME DE MICROCONTROLEURS/MICROPROCESSEURS ET DE MODULES PERIPHERIQUES ASSOCIES[2000/32]
Entry into regional phase17.04.2000National basic fee paid 
17.04.2000Designation fee(s) paid 
17.04.2000Examination fee paid 
Examination procedure17.04.2000Examination requested  [2000/32]
07.03.2002Despatch of a communication from the examining division (Time limit: M06)
16.09.2002Reply to a communication from the examining division
31.10.2002Communication of intention to grant the patent
24.02.2003Fee for grant paid
24.02.2003Fee for publishing/printing paid
Opposition(s)13.09.2004No opposition filed within time limit [2004/49]
Fees paidRenewal fee
25.09.2001Renewal fee patent year 03
28.09.2002Renewal fee patent year 04
19.09.2003Renewal fee patent year 05
Lapses during opposition  TooltipGB10.12.2003
[2004/45]
Cited inInternational search[A]US5546562  (PATEL CHANDRESH [US]) [A] 1-6 * abstract *;
 [A]US5663900  (BHANDARI NARPAT [US], et al) [A] 1-6 * abstract *;
 [A]US5692161  (BASSET PHILIPPE [FR], et al) [A] 1-6 * abstract *