-
EP1058172
European procedure
- EP About this file
- EP Legal status
- EP Federated register
- EP Event history
- EP Citations
- EP Patent family
- EP All documents
Extract from the Register of European Patents
EP About this file: EP1058172
| EP1058172 - Semiconductor processing techniques [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 24.02.2006 Database last updated on 16.09.2024 | Most recent event Tooltip | 24.02.2006 | Application deemed to be withdrawn | published on 12.04.2006 [2006/15] | Applicant(s) | For all designated states Applied Materials, Inc. 3050 Bowers Avenue Santa Clara, CA 95054 / US | [N/P] |
| Former [2000/49] | For all designated states Applied Materials, Inc. 3050 Bowers Avenue Santa Clara, California 95054 / US | Inventor(s) | 01 /
Nulman, Jaim 4272 Suzanne Dr. Palo Alto, CA / US | [2000/49] | Representative(s) | Kirschner, Klaus Dieter Puschmann Borchert Bardehle Patentanwälte Partnerschaft Postfach 10 12 31 80086 München / DE | [N/P] |
| Former [2000/49] | Kirschner, Klaus Dieter, Dipl.-Phys. Schneiders & Behrendt Rechtsanwälte - Patentanwälte Sollner Strasse 38 81479 München / DE | Application number, filing date | 00111306.7 | 25.05.2000 | [2000/49] | Priority number, date | US19990323704 | 01.06.1999 Original published format: US 323704 | [2000/49] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP1058172 | Date: | 06.12.2000 | Language: | EN | [2000/49] | Type: | A3 Search report | No.: | EP1058172 | Date: | 28.01.2004 | [2004/05] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 12.12.2003 | Classification | IPC: | G05B19/418, H01L21/66 | [2004/05] | CPC: |
G03F7/70525 (EP,US);
H01L22/00 (KR);
G05B19/40938 (EP,US);
G05B19/4183 (EP,US);
Y02P80/10 (EP,US);
Y02P90/02 (EP,US);
Y02P90/80 (EP,US)
(-)
|
| Former IPC [2000/49] | G05B19/4093, G05B19/418 | Designated contracting states | DE, GB [2004/43] |
| Former [2000/49] | AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Title | German: | Verfahren zur Bearbeitung von Halbleitern | [2000/49] | English: | Semiconductor processing techniques | [2000/49] | French: | Techniques de traitement de semi-conducteurs | [2000/49] | Examination procedure | 28.07.2004 | Examination requested [2004/40] | 03.09.2004 | Despatch of a communication from the examining division (Time limit: M06) | 01.03.2005 | Reply to a communication from the examining division | 24.05.2005 | Despatch of a communication from the examining division (Time limit: M04) | 05.10.2005 | Application deemed to be withdrawn, date of legal effect [2006/15] | 09.11.2005 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time [2006/15] | Fees paid | Renewal fee | 31.05.2002 | Renewal fee patent year 03 | 02.06.2003 | Renewal fee patent year 04 | 05.05.2004 | Renewal fee patent year 05 | 13.05.2005 | Renewal fee patent year 06 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]DE19747574 (SIEMENS AG [DE]) [X] 1-5 * abstract * * page 1 - page 7 * * claims 1,2 *; | [A]US4796194 (ATHERTON ROBERT W [US]) [A] 1-5 * column 4, line 15 - column 16, line 63 *; | [A]US5148370 (LITT MARIA [US], et al) [A] 1-5 * column 1, line 7 - column 3, line 5 * * column 5, line 44 - line 66; figure 2 * * column 8, line 13 - line 65; figure 4 * * column 11, line 39 - line 57 * |