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EP1102408
European procedure
Extract from the Register of European Patents
EP About this file: EP1102408
| EP1102408 - Viterbi decoder [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 27.04.2007 Database last updated on 07.06.2024 | Most recent event Tooltip | 17.10.2008 | Change - applicant | published on 19.11.2008 [2008/47] | Applicant(s) | For all designated states MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 1006, Oaza Kadoma Kadoma-shi Osaka 571-8501 / JP | [2008/47] |
| Former [2006/25] | For all designated states MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 1006, Oaza Kadoma Kadoma-shi, Osaka 571-8501 / JP | ||
| Former [2001/21] | For all designated states MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 1006, Ohaza Kadoma Kadoma-shi, Osaka 571-8501 / JP | Inventor(s) | 01 /
Sasagawa, Yukihiro 138-8-A-503, Shimizu-cho, Hazukashi, Fushimi-ku Kyoto-shi, Kyoto 612-8485 / JP | [2001/21] | Representative(s) | Jeffrey, Philip Michael Dehns St Bride's House 10 Salisbury Square London EC4Y 8JD / GB | [N/P] |
| Former [2001/21] | Jeffrey, Philip Michael Frank B. Dehn & Co. 179 Queen Victoria Street London EC4V 4EL / GB | Application number, filing date | 00310118.5 | 15.11.2000 | [2001/21] | Priority number, date | JP19990331612 | 22.11.1999 Original published format: JP 33161299 | [2001/21] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP1102408 | Date: | 23.05.2001 | Language: | EN | [2001/21] | Type: | A3 Search report | No.: | EP1102408 | Date: | 27.08.2003 | [2003/35] | Type: | B1 Patent specification | No.: | EP1102408 | Date: | 21.06.2006 | Language: | EN | [2006/25] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 10.07.2003 | Classification | IPC: | H03M13/41 | [2001/21] | CPC: |
H03M13/4107 (EP,US);
H03M13/41 (KR)
| Designated contracting states | DE, FR, GB [2004/21] |
| Former [2001/21] | AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE, TR | Title | German: | Viterbi Dekoder | [2001/21] | English: | Viterbi decoder | [2001/21] | French: | Décodeur Viterbi | [2001/21] | Examination procedure | 12.12.2003 | Examination requested [2004/07] | 23.01.2004 | Despatch of a communication from the examining division (Time limit: M04) | 02.06.2004 | Reply to a communication from the examining division | 05.08.2005 | Despatch of a communication from the examining division (Time limit: M02) | 05.10.2005 | Reply to a communication from the examining division | 23.12.2005 | Communication of intention to grant the patent | 02.05.2006 | Fee for grant paid | 02.05.2006 | Fee for publishing/printing paid | Opposition(s) | 22.03.2007 | No opposition filed within time limit [2007/22] | Fees paid | Renewal fee | 28.11.2002 | Renewal fee patent year 03 | 25.11.2003 | Renewal fee patent year 04 | 29.11.2004 | Renewal fee patent year 05 | 23.11.2005 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0660534 (AT & T CORP [US]) [A] 1-8* whole document *; | [Y]US5923713 (HATAKEYAMA IZUMI [JP]) [Y] 2,4 * page 13, column 5, line 8 - line 16 * * page 6; figure 6 *; | [XAY] - SHUNG C B ET AL, "Area-efficient architectures for the Viterbi algorithm - Part I: Theory", IEEE TRANSACTIONS ON COMMUNICATIONS, IEEE INC. NEW YORK, US, (19930401), vol. 41, no. 4, ISSN 0090-6778, pages 636 - 644, XP000372705 [X] 1,3 * page 636, column L, paragraph 2 * * page 637, column R, paragraph 4; figure 2 * [A] 5-8 [Y] 2,4 DOI: http://dx.doi.org/10.1109/26.223789 | [X] - SHUNG C B ET AL, "Area-efficient architectures for the Viterbi algorithm - Part II: Applications", IEEE TRANSACTIONS ON COMMUNICATIONS, IEEE INC. NEW YORK, US, (19930501), vol. 41, no. 5, pages 802 - 807, XP002245075 [X] 1,3 * page 802, column R, paragraph 2; figure 1 * DOI: http://dx.doi.org/10.1109/26.225495 |