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Extract from the Register of European Patents

EP About this file: EP1104017

EP1104017 - Method of flip-chip mounting a semiconductor chip to a circuit board [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  14.03.2008
Database last updated on 14.09.2024
Most recent event   Tooltip14.03.2008No opposition filed within time limitpublished on 16.04.2008  [2008/16]
Applicant(s)For all designated states
OMRON CORPORATION
801, Minamifudoudou-cho, Horikawahigashiiru, Shiokouji-dori, Shimogyo-ku
Kyoto-shi, Kyoto 600-8530 / JP
[2006/41]
Former [2001/22]For all designated states
Omron Corporation
801, Minamifudoudou-cho, Horikawahigashiiru, Shiokouji-doori, Shimogyo-ku
Kyoto-shi, Kyoto-fu, 600-8530 / JP
Inventor(s)01 / Kawai, Wakahiro, 801, Minamifudoudou-cho
Horikawahigashiiru, Shiokouji-dori
Shimagyo-ku, Kyoto-shi, Kyoti 600-8530 / JP
 [2001/22]
Representative(s)Calderbank, Thomas Roger, et al
Mewburn Ellis LLP
City Tower
40 Basinghall Street
London EC2V 5DE / GB
[N/P]
Former [2001/22]Calderbank, Thomas Roger, et al
MEWBURN ELLIS York House 23 Kingsway
London WC2B 6HP / GB
Application number, filing date00310393.423.11.2000
[2001/22]
Priority number, dateJP1999033340924.11.1999         Original published format: JP 33340999
[2001/22]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP1104017
Date:30.05.2001
Language:EN
[2001/22]
Type: A3 Search report 
No.:EP1104017
Date:12.11.2003
[2003/46]
Type: B1 Patent specification 
No.:EP1104017
Date:09.05.2007
Language:EN
[2007/19]
Search report(s)(Supplementary) European search report - dispatched on:EP01.10.2003
ClassificationIPC:H01L21/60, H01L21/58
[2001/22]
CPC:
H01L24/81 (EP,US); H01L23/28 (KR); H01L21/563 (EP,US);
H01L24/29 (EP,US); H01L24/32 (EP,US); H01L24/83 (EP,US);
H05K3/061 (EP,US); H01L2224/13144 (EP,US); H01L2224/16225 (EP,US);
H01L2224/16227 (EP,US); H01L2224/32225 (EP,US); H01L2224/73203 (EP,US);
H01L2224/73204 (EP,US); H01L2224/81191 (EP,US); H01L2224/81801 (EP,US);
H01L2224/83192 (EP,US); H01L2924/01004 (EP,US); H01L2924/01005 (EP,US);
H01L2924/01006 (EP,US); H01L2924/01013 (EP,US); H01L2924/01015 (EP,US);
H01L2924/01023 (EP,US); H01L2924/01029 (EP,US); H01L2924/01033 (EP,US);
H01L2924/01047 (EP,US); H01L2924/01074 (EP,US); H01L2924/01075 (EP,US);
H01L2924/01078 (EP,US); H01L2924/01079 (EP,US); H01L2924/01327 (EP,US);
H01L2924/014 (EP,US); H05K1/09 (EP,US); H05K2201/0129 (EP,US);
H05K2201/10674 (EP,US); H05K2201/10977 (EP,US); H05K2203/0285 (EP,US);
H05K2203/1189 (EP,US); H05K3/328 (EP,US) (-)
C-Set:
H01L2224/16225, H01L2224/13144, H01L2924/00 (US,EP);
H01L2224/73204, H01L2224/16225, H01L2224/32225, H01L2924/00 (EP,US);
H01L2224/83192, H01L2224/32225, H01L2924/00 (US,EP);
H01L2224/83192, H01L2224/73204, H01L2224/16225, H01L2224/32225, H01L2924/00 (US,EP)
Designated contracting statesDE,   FR,   GB,   IT [2004/32]
Former [2001/22]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE,  TR 
TitleGerman:Flip-Chip-Montage eines IC auf eine Leiterplatte[2001/22]
English:Method of flip-chip mounting a semiconductor chip to a circuit board[2001/22]
French:Montage à puce inversée d'une puce semi-conducteur sur un panneau à circuit[2001/22]
Examination procedure12.12.2000Examination requested  [2001/22]
12.05.2004Despatch of a communication from the examining division (Time limit: M04)
17.09.2004Reply to a communication from the examining division
13.11.2006Communication of intention to grant the patent
23.03.2007Fee for grant paid
23.03.2007Fee for publishing/printing paid
Divisional application(s)EP07006007.4  / EP1801867
Opposition(s)12.02.2008No opposition filed within time limit [2008/16]
Fees paidRenewal fee
13.11.2002Renewal fee patent year 03
12.11.2003Renewal fee patent year 04
12.11.2004Renewal fee patent year 05
14.11.2005Renewal fee patent year 06
14.11.2006Renewal fee patent year 07
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Documents cited:Search[X]JPH10200231  ;
 [A]JPS6325939  ;
 [X]GB795822  (MASSON SEELEY AND COMPANY LTD) [X] 4,5,8-11,13-18 * page 2, column 84 - column 113; example 1 *;
 [X]US3320657  (STROBEL JOHN S) [X] 4,5,8-11,13-18 * column 1, line 58 - column 2, line 48; figure 1 * * column 3, lines 65-68 *;
 [A]US5363277  (TANAKA OSAMU [JP]) [A] 1-3* figures 1-4 *;
 [X]EP0821408  (SHARP KK [JP]) [X] 1-3,12 * column 4, line 48 - column 5, line 58; figures 4A-4D *;
 [A]US5874780  (MURAKAMI TOMOO [JP]) [A] 1-3 * figures 3A-3D *;
 [X]EP0954208  (MATSUSHITA ELECTRIC IND CO LTD [JP]) [X] 1-3,12 * figures 1E-1G *
 [X]  - PATENT ABSTRACTS OF JAPAN, (19981031), vol. 1998, no. 12, & JP10200231 A 19980731 (OMRON CORP) [X] 6,7,19 * page 46, column 49; figure 4 * * page 52 - page 55; figure 5 * * figures 1,2,9A *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19880630), vol. 012, no. 232, Database accession no. (E - 628), & JP63025939 A 19880203 (RICOH CO LTD) [A] 1-3 * abstract *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.