-
EP1191831
European procedure
- EP About this file
- EP Legal status
- EP Federated register
- EP Event history
- EP Citations
- EP Patent family
- EP All documents
Extract from the Register of European Patents
EP About this file: EP1191831
| EP1191831 - Apparatus for mounting semiconductor chips [Right-click to bookmark this link] | Status | The application has been withdrawn Status updated on 14.06.2002 Database last updated on 06.07.2024 | Most recent event Tooltip | 14.06.2002 | Withdrawal of application | published on 31.07.2002 [2002/31] | Applicant(s) | For all designated states ESEC Trading S.A. Hinterbergstrasse 32, Postfach 5503 6330 Cham / CH | [N/P] |
| Former [2002/13] | For all designated states Esec Trading S.A. Hinterbergstrasse 32, Postfach 5503 6330 Cham / CH | Inventor(s) | 01 /
Mannhart, Eugen, Dr. St Jakobsstrasse 40 6330 Cham / CH | 02 /
Günther, Thomas Alte Landstrasse 99 8800 Thalwil / CH | 03 /
Leu, Felix Gubelstrasse 5 6300 Zug / CH | 04 /
Dschen, Tsing, Dr. Rosenstrasse 34 8953 Dietikon / CH | [2002/13] | Representative(s) | Falk, Urs Patentanwaltsbüro Dr. Urs Falk Eichholzweg 9A 6312 Steinhausen / CH | [N/P] |
| Former [2002/13] | Falk, Urs, Dr. Patentanwaltsbüro Dr. Urs Falk, Eichholzweg 9A 6312 Steinhausen / CH | Application number, filing date | 00810824.3 | 13.09.2000 | [2002/13] | Filing language | DE | Procedural language | DE | Publication | Type: | A1 Application with search report | No.: | EP1191831 | Date: | 27.03.2002 | Language: | DE | [2002/13] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 19.02.2001 | Classification | IPC: | H05K13/04, H01L21/00 | [2002/13] | CPC: |
H01L21/6838 (EP)
| Designated contracting states | AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE [2002/13] | Extension states | AL | Not yet paid | LT | Not yet paid | LV | Not yet paid | MK | Not yet paid | RO | Not yet paid | SI | Not yet paid | Title | German: | Vorrichtung für die Montage von Halbleiterchips | [2002/13] | English: | Apparatus for mounting semiconductor chips | [2002/13] | French: | Dispositif pour le montage de puces à base de semiconducteur | [2002/13] | Examination procedure | 04.06.2002 | Application withdrawn by applicant [2002/31] |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]US5324087 (SHIMOSE YUICHIRO [JP], et al) [A] 1* column 1, line 28 - column 2, line 39; figure 4 *; | [A]EP0907311 (ADVANTEST CORP [JP]) [A] 1-4 * the whole document * |