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Extract from the Register of European Patents

EP About this file: EP1298712

EP1298712 - Gate structure and method of forming the same [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  04.11.2011
Database last updated on 03.09.2024
Most recent event   Tooltip04.11.2011No opposition filed within time limitpublished on 07.12.2011  [2011/49]
Applicant(s)For all designated states
Texas Instruments Incorporated
7839 Churchill Way
Mail Station 3999
Dallas, Texas 75251 / US
[N/P]
Former [2010/52]For all designated states
Texas Instruments Incorporated
7839 Churchill Way Mail Station 3999
Dallas, Texas 75251 / US
Former [2003/14]For all designated states
Texas Instruments Incorporated
7839 Churchill Way, Mail Station 3999
Dallas, Texas 75251 / US
Inventor(s)01 / Wallace, Robert M.
428 Park Bend Drive
Richardson, TX 75081 / US
02 / Gnade, Bruce E.
2607 Sir Gawain
Lewisville, TX 75056 / US
 [2003/14]
Representative(s)Holt, Michael
Texas Instruments Limited
European Patent Department
3rd Floor
401 Grafton Gate
Milton Keynes MK9 1AQ / GB
[N/P]
Former [2003/14]Holt, Michael
Texas Instruments Ltd., EPD MS/13, 800 Pavilion Drive
Northampton Business Park, Northampton NN4 7YL / GB
Application number, filing date02021976.230.09.2002
[2003/14]
Priority number, dateUS20010325519P28.09.2001         Original published format: US 325519 P
[2003/14]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP1298712
Date:02.04.2003
Language:EN
[2003/14]
Type: A3 Search report 
No.:EP1298712
Date:08.12.2004
[2004/50]
Type: B1 Patent specification 
No.:EP1298712
Date:29.12.2010
Language:EN
[2010/52]
Search report(s)(Supplementary) European search report - dispatched on:EP26.10.2004
ClassificationIPC:H01L21/28, H01L29/51, H01L29/10, H01L21/8238
[2010/35]
CPC:
H01L21/28185 (EP,US); H01L21/28088 (EP,US); H01L21/28114 (EP,US);
H01L21/28194 (EP,US); H01L21/823807 (EP,US); H01L21/823814 (EP,US);
H01L21/823842 (EP,US); H01L21/823857 (EP,US); H01L29/1054 (EP,US);
H01L29/42376 (EP,US); H01L29/4966 (EP,US); H01L29/517 (EP,US);
H01L29/66545 (EP,US); H01L21/28008 (EP,US) (-)
Former IPC [2004/50]H01L21/28, H01L29/51, H01L29/10, H01L29/49, H01L29/423, H01L21/336
Former IPC [2003/48]H01L21/28, H01L29/51, H01L29/10, H01L29/49
Former IPC [2003/14]H01L21/28, H01L29/51, H01L29/423, H01L29/10, H01L29/49
Designated contracting statesDE,   FR,   GB [2005/35]
Former [2003/14]AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE,  SK,  TR 
TitleGerman:Gate-Struktur und Verfahren zur Herstellung[2003/14]
English:Gate structure and method of forming the same[2003/14]
French:Structure de grille et sa méthode de fabrication[2003/14]
Examination procedure08.06.2005Examination requested  [2005/32]
28.11.2008Despatch of a communication from the examining division (Time limit: M06)
08.04.2009Reply to a communication from the examining division
31.08.2010Communication of intention to grant the patent
10.11.2010Fee for grant paid
10.11.2010Fee for publishing/printing paid
Opposition(s)30.09.2011No opposition filed within time limit [2011/49]
Fees paidRenewal fee
30.09.2004Renewal fee patent year 03
30.09.2005Renewal fee patent year 04
02.10.2006Renewal fee patent year 05
01.10.2007Renewal fee patent year 06
30.09.2008Renewal fee patent year 07
30.09.2009Renewal fee patent year 08
30.09.2010Renewal fee patent year 09
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[A]  - WILK G D ET AL, "Stable zirconium silicate gate dielectrics eposited directly on silicon", APPLIED PHYSICS LETTERS, (20000103), vol. 76, no. 1, pages 112 - 114, XP002256294 [A] 1-11 * the whole document *

DOI:   http://dx.doi.org/10.1063/1.125673
 [A]  - LEE C H ET AL, "MOS CHARACTERISTICS OF ULTRA THIN RAPID THERMAL CVD ZRO2 AND ZR SILICATE GATE DIELECTRICS", INTERNATIONAL ELECTRON DEVICES MEETING 2000. IEDM. TECHNICAL DIGEST. SAN FRANCISCO, CA, DEC. 10 - 13, 2000, NEW YORK, NY: IEEE, US, (20001210), ISBN 0-7803-6439-2, pages 27 - 30, XP000988803 [A] 1-11 * the whole document *
 [A]  - QI W-J ET AL, "PERFORMANCE OF MOSFETS WITH ULTRA THIN ZRO2 AND ZR SILICATE GATE DIELECTRICS", 2000 SYMPOSIUM ON VLSI TECHNOLOGY. DIGEST OF TECHNICAL PAPERS. HONOLULU, JUNE 13-15, 2000, SYMPOSIUM ON VLSI TECHNOLOGY, NEW YORK, NY: IEEE, US, (20000613), ISBN 0-7803-6306-X, pages 40 - 41, XP000970754 [A] 1-11 * the whole document *
 [A]  - WILK G D ET AL, "HIGH-KAPPA GATE DIELECTRICS: CURRENT STATUS AND MATERIALS PROPERTIES CONSIDERATIONS", JOURNAL OF APPLIED PHYSICS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, (20010515), vol. 89, no. 10, ISSN 0021-8979, pages 5243 - 5275, XP001049066 [A] 1-11 * page 5262, column L, line 19 - line 29 * * page 5262, column R, line 5 - line 24 *

DOI:   http://dx.doi.org/10.1063/1.1361065
 [DA]  - WILK G D ET AL, "ELECTRICAL PROPERTIES OF HAFNIUM SILICATE GATE DIELECTRICS DEPOSITED DIRECTLY ON SILICON", APPLIED PHYSICS LETTERS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, (19990510), vol. 74, no. 19, ISSN 0003-6951, pages 2854 - 2856, XP000834679 [DA] 1-11 * the whole document *

DOI:   http://dx.doi.org/10.1063/1.124036
 [A]  - WILK G D ET AL, "HAFNIUM AND ZIRCONIUM SILICATES FOR ADVANCED GATE DIELECTRICS", JOURNAL OF APPLIED PHYSICS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, (20000101), vol. 87, no. 1, ISSN 0021-8979, pages 484 - 492, XP000947641 [A] 1-11 * the whole document *

DOI:   http://dx.doi.org/10.1063/1.371888
 [A]  - NGAI T ET AL, "TRANSCONDUCTANCE IMPROVEMENT IN SURFACE-CHANNEL SIGE P-METAL-OXIDE-SILICON FIELD-EFFECT TRANSISTORS USING A ZRO2 GATE DIELECTRIC", APPLIED PHYSICS LETTERS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, (20010514), vol. 78, no. 20, ISSN 0003-6951, pages 3085 - 3087, XP001063717 [A] 1-11 * the whole document *

DOI:   http://dx.doi.org/10.1063/1.1372204
 [DA]  - NGAI T ET AL, "Electrical properties of ZrO2 gate dielectric on SiGe", APPLIED PHYSICS LETTERS, (20000124), vol. 76, no. 4, pages 502 - 504, XP002298372 [DA] * the whole document *

DOI:   http://dx.doi.org/10.1063/1.125801
by applicant   - WILK; WALLACE, "Electrical Properties of Hafnium Silicate Gate Dielectrics Deposited Directly on Silicon", APPL. PHYS. LETT., (1999), vol. 74, page 2854
    - NGAI ET AL., "Electrical Properties of Zr02 Gate Dielectric on SiGe", APPL.PHY.LETT., (2000), vol. 76, page 502
    - WILK G D ET AL., "Stable zirconium silicate gate dielectrics deposited directly on silicon", APPL. PHYS. LETT., (20000103), vol. 76, no. 1, pages 112 - 114
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.