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Extract from the Register of European Patents

EP About this file: EP1556866

EP1556866 - FLASH MEMORY CELL ARRAYS HAVING DUAL CONTROL GATES PER MEMORY CELL CHARGE STORAGE ELEMENT [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  30.10.2009
Database last updated on 24.04.2024
Most recent event   Tooltip30.09.2011Lapse of the patent in a contracting state
New state(s): CY, TR		published on 02.11.2011  [2011/44]
Applicant(s)For all designated states
SanDisk Corporation
140 Caspian Court
Sunnyvale, CA 94089 / US
[2005/30]
Inventor(s)01 / HARARI, Eliyahou
104 Auzerais Court
Los Gatos, CA 95030 / US
 [2005/30]
Representative(s)Hitchcock, Esmond Antony
Marks & Clerk LLP
90 Long Acre
London
WC2E 9RA / GB
[N/P]
Former [2005/30]Hitchcock, Esmond Antony
Lloyd Wise Commonwealth House, 1-19 New Oxford Street
London WC1A 1LW / GB
Application number, filing date03770742.909.10.2003
[2005/30]
WO2003US32383
Priority number, dateUS2002028274728.10.2002         Original published format: US 282747
[2005/30]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2004040583
Date:13.05.2004
Language:EN
[2004/20]
Type: A1 Application with search report 
No.:EP1556866
Date:27.07.2005
Language:EN
The application published by WIPO in one of the EPO official languages on 13.05.2004 takes the place of the publication of the European patent application.
[2005/30]
Type: B1 Patent specification 
No.:EP1556866
Date:24.12.2008
Language:EN
[2008/52]
Search report(s)International search report - published on:EP13.05.2004
ClassificationIPC:G11C16/04
[2005/30]
CPC:
G11C16/0483 (EP,US); G11C16/04 (KR); H10B41/30 (EP,US);
G11C11/34 (KR); H01L29/40114 (EP,US); H01L29/42348 (EP,US);
H01L29/66825 (EP,US); H01L29/7881 (EP,US); H10B41/35 (EP,US);
H10B69/00 (EP,US) (-)
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HU,   IE,   IT,   LI,   LU,   MC,   NL,   PT,   RO,   SE,   SI,   SK,   TR [2005/30]
Extension statesALNot yet paid
LTNot yet paid
LVNot yet paid
MKNot yet paid
TitleGerman:FLASH-SPEICHERZELLENMATRIX MIT ZWEI GATE-ELEKTRODEN PRO LADUNGSSPEICHERELEMENT[2005/30]
English:FLASH MEMORY CELL ARRAYS HAVING DUAL CONTROL GATES PER MEMORY CELL CHARGE STORAGE ELEMENT[2005/30]
French:MATRICES DE CELLULES DE MEMOIRE FLASH DOTEES DE GRILLES DE COMMANDE DOUBLES PAR ELEMENT DE STOCKAGE DE CHARGE DE CELLULE DE MEMOIRE[2005/30]
Entry into regional phase04.05.2005National basic fee paid 
04.05.2005Designation fee(s) paid 
04.05.2005Examination fee paid 
Examination procedure04.05.2005Examination requested  [2005/30]
03.11.2006Despatch of a communication from the examining division (Time limit: M06)
09.05.2007Reply to a communication from the examining division
11.06.2007Despatch of a communication from the examining division (Time limit: M06)
26.11.2007Reply to a communication from the examining division
15.05.2008Communication of intention to grant the patent
17.09.2008Fee for grant paid
17.09.2008Fee for publishing/printing paid
Opposition(s)25.09.2009No opposition filed within time limit [2009/49]
Fees paidRenewal fee
27.10.2005Renewal fee patent year 03
27.10.2006Renewal fee patent year 04
29.10.2007Renewal fee patent year 05
27.10.2008Renewal fee patent year 06
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court		 See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipAT24.12.2008
BE24.12.2008
CY24.12.2008
CZ24.12.2008
DK24.12.2008
EE24.12.2008
FI24.12.2008
IT24.12.2008
RO24.12.2008
SI24.12.2008
SK24.12.2008
TR24.12.2008
BG24.03.2009
SE24.03.2009
GR25.03.2009
ES04.04.2009
PT25.05.2009
HU25.06.2009
[2011/43]
Former [2011/31]AT24.12.2008
BE24.12.2008
CZ24.12.2008
DK24.12.2008
EE24.12.2008
FI24.12.2008
IT24.12.2008
RO24.12.2008
SI24.12.2008
SK24.12.2008
BG24.03.2009
SE24.03.2009
GR25.03.2009
ES04.04.2009
PT25.05.2009
HU25.06.2009
Former [2011/14]AT24.12.2008
BE24.12.2008
CZ24.12.2008
DK24.12.2008
EE24.12.2008
FI24.12.2008
IT24.12.2008
RO24.12.2008
SI24.12.2008
SK24.12.2008
BG24.03.2009
SE24.03.2009
GR25.03.2009
ES04.04.2009
PT25.05.2009
Former [2010/48]AT24.12.2008
BE24.12.2008
CZ24.12.2008
DK24.12.2008
EE24.12.2008
FI24.12.2008
RO24.12.2008
SI24.12.2008
SK24.12.2008
BG24.03.2009
SE24.03.2009
GR25.03.2009
ES04.04.2009
PT25.05.2009
Former [2009/46]AT24.12.2008
BE24.12.2008
CZ24.12.2008
DK24.12.2008
EE24.12.2008
FI24.12.2008
RO24.12.2008
SI24.12.2008
SK24.12.2008
BG24.03.2009
SE24.03.2009
ES04.04.2009
PT25.05.2009
Former [2009/43]AT24.12.2008
BE24.12.2008
CZ24.12.2008
EE24.12.2008
FI24.12.2008
RO24.12.2008
SI24.12.2008
SK24.12.2008
BG24.03.2009
SE24.03.2009
ES04.04.2009
PT25.05.2009
Former [2009/39]AT24.12.2008
BE24.12.2008
CZ24.12.2008
EE24.12.2008
FI24.12.2008
RO24.12.2008
SI24.12.2008
BG24.03.2009
SE24.03.2009
ES04.04.2009
PT25.05.2009
Former [2009/36]BE24.12.2008
EE24.12.2008
FI24.12.2008
RO24.12.2008
SI24.12.2008
BG24.03.2009
ES04.04.2009
Former [2009/34]BE24.12.2008
FI24.12.2008
SI24.12.2008
BG24.03.2009
ES04.04.2009
Former [2009/32]BE24.12.2008
FI24.12.2008
SI24.12.2008
Former [2009/26]FI24.12.2008
SI24.12.2008
Cited inInternational search[A]JPH0637328  ;
 [A]EP0373698  (PHILIPS NV [NL]) [A] 1,5 * figures 8,9A-C *;
 [X]US5736443  (PARK SUNG BIN [KR], et al) [X] 5,6,9,10 * abstract * * figure 2E * * column 3, line 15 - line 48 *;
 [X]US6133098  (OGURA SEIKI [US], et al) [X] 1,2,5,6 * figures 3A-D *;
 [A]US2002102774  (KAO DAH-BIN [US], et al) [A] 1,5,9,25 * figures 6,7D *;
 [PA]EP1265289  (IMEC INTER UNI MICRO ELECTR [BE]) [PA] 15,22,25 * abstract * * figure 3 *;
 [PA]EP1289023  (SHARP KK [JP]) [PA] 1,5 * figure 23 *;
 [X]  - HAYASHI Y ET AL, "TWIN MONOS CELL WITH DUAL CONTROL GATES", 2000 SYMPOSIUM ON VLSI TECHNOLOGY. DIGEST OF TECHNICAL PAPERS. HONOLULU, JUNE 13-15, 2000, SYMPOSIUM ON VLSI TECHNOLOGY, NEW YORK, NY: IEEE, US, (20000613), ISBN 0-7803-6306-X, pages 122 - 123, XP000970787 [X] 1,2,5,6 * figures 1,2A-B *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19940516), vol. 018, no. 255, Database accession no. (E - 1548), & JP06037328 A 19940210 (FUJITSU LTD) [A] 1,5 * abstract *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.