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Extract from the Register of European Patents

EP About this file: EP1470892

EP1470892 - Polishing pad and method of polishing a semiconductor wafer [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  27.01.2006
Database last updated on 24.04.2024
Most recent event   Tooltip25.04.2008Change - representativepublished on 28.05.2008  [2008/22]
Applicant(s)For all designated states
JSR Corporation
6-10, Tsukiji 5-chome, Chuo-ku
Tokyo 104-0045 / JP
[N/P]
Former [2004/44]For all designated states
JSR Corporation
6-10, Tsukiji 5-chome, Chuo-ku
Tokyo 104-0045 / JP
Inventor(s)01 / Aoi, Hiromi
c/o JSR Corporation 6-10, Tsukiji 5-chome Chuo-ku
Tokyo 104-0045 / JP
02 / Shiho, Hiroshi
c/o JSR Corporation 6-10, Tsukiji 5-chome Chuo-ku
Tokyo 104-0045 / JP
03 / Hasegawa, Kou
c/o JSR Corporation 6-10, Tsukiji 5-chome Chuo-ku
Tokyo 104-0045 / JP
04 / Kawahashi, Nobuo
c/o JSR Corporation 6-10, Tsukiji 5-chome Chuo-ku
Tokyo 104-0045 / JP
 [2004/44]
Representative(s)TBK
Bavariaring 4-6
80336 München / DE
[N/P]
Former [2008/22]TBK-Patent
Bavariaring 4-6
80336 München / DE
Former [2005/33]TBK-Patent
Bavariaring 4-6
80336 München / DE
Former [2004/44]Leson, Thomas Johannes Alois, Dipl.-Ing.
Tiedtke-Bühling-Kinne & Partner, TBK-Patent, Bavariaring 4
80336 München / DE
Application number, filing date04009441.921.04.2004
[2004/44]
Priority number, dateJP2003011753822.04.2003         Original published format: JP 2003117538
[2004/44]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP1470892
Date:27.10.2004
Language:EN
[2004/44]
Search report(s)(Supplementary) European search report - dispatched on:EP05.08.2004
ClassificationIPC:B24B37/04, B24D7/12
[2004/44]
CPC:
B24B37/205 (EP,US); A61J11/007 (KR); A61J11/0035 (KR);
A61J11/006 (KR)
Designated contracting statesDE,   FR,   IT [2005/29]
Former [2004/44]AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HU,  IE,  IT,  LI,  LU,  MC,  NL,  PL,  PT,  RO,  SE,  SI,  SK,  TR 
TitleGerman:Schleifkissen und Verfahren zum Polieren einer Halbleiterplatte[2004/44]
English:Polishing pad and method of polishing a semiconductor wafer[2004/44]
French:Tampon de polissage et procédé de polissage d'une plaquette de semi-conductrice[2004/44]
Examination procedure08.11.2004Examination requested  [2005/01]
20.04.2005Despatch of a communication from the examining division (Time limit: M04)
31.08.2005Application deemed to be withdrawn, date of legal effect  [2006/11]
14.10.2005Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time  [2006/11]
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Documents cited:Search[Y]US5893796  (BIRANG MANOOCHER [US], et al) [Y] 1-12 * column 5, line 6 - column 22, line 18; figures 3A,3D,3F *;
 [A]EP0941806  (LAM RES CORP [US]);
 [Y]US2002144771  (KUCZYNSKI JOSEPH PAUL [US]) [Y] 1,2,7-12 * paragraphs [0018] - [0048]; figures 1,2 *;
 [Y]EP1252973  (JSR CORP [JP]) [Y] 3-6 * the whole document *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.