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Extract from the Register of European Patents

EP About this file: EP1640885

EP1640885 - METHOD FOR CREATING PARALLEL PROCESSING SYSTEM [Right-click to bookmark this link]
Status	The application is deemed to be withdrawn Status updated on 23.01.2015 Database last updated on 15.06.2024
Most recent event Tooltip	23.01.2015	Application deemed to be withdrawn	published on 25.02.2015 [2015/09]
Applicant(s)	For all designated states Fuji Xerox Co., Ltd. 7-3, Akasaka 9-chome, Minato-ku Tokyo / JP
	[2010/36]
Former [2006/13]	For all designated states IPFlex Inc. 27-1, Kamiosaki 2chome, Shinagawa-ku Tokyo 1410021 / JP
Inventor(s)	01 / SHIMURA, Hiroshi; c/o IPFlex Inc., 27-1, Kamiosaki 2-chome, Shinagaw a-ku Tokyo;1410021 / JP
	[2006/13]
Representative(s)	Körber, Martin Hans, et al Mitscherlich PartmbB Patent- und Rechtsanwälte Postfach 33 06 09 80066 München / DE
	[N/P]
Former [2010/36]	Körber, Martin Hans, et al Mitscherlich & Partner Patent- und Rechtsanwälte Postfach 33 06 09 80066 München / DE
Former [2006/13]	Körber, Martin Hans Mitscherlich & Partner Patentanwälte Sonnenstrasse 33 80331 München / DE
Application number, filing date	04746469.8	25.06.2004
	[2006/13]
	WO2004JP09000
Priority number, date	JP20030185481	27.06.2003 Original published format: JP 2003185481
	[2006/13]
Filing language	JA
Procedural language	EN
Publication	Type:	A1 Application with search report
	No.:	WO2005001723
	Date:	06.01.2005
	Language:	EN
	[2005/01]
	Type:	A1 Application with search report
	No.:	EP1640885
	Date:	29.03.2006
	Language:	EN
	The application published by WIPO in one of the EPO official languages on 06.01.2005 takes the place of the publication of the European patent application.
	[2006/13]
Search report(s)	International search report - published on:	JP	06.01.2005
	(Supplementary) European search report - dispatched on:	EP	10.08.2006
Classification	IPC:	G06F17/50	[2006/13]
	CPC:	G06F30/30 (EP,US)
Designated contracting states	AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IT, LI, LU, MC, NL, PL, PT, RO, SE, SI, SK, TR [2006/13]
Extension states	AL	Not yet paid
	HR	Not yet paid
	LT	Not yet paid
	LV	Not yet paid
	MK	Not yet paid
Title	German:	VERFAHREN ZUR ERZEUGUNG EINES PARALLELEN VERARBEITUNGSSYSTEMS	[2006/13]
	English:	METHOD FOR CREATING PARALLEL PROCESSING SYSTEM	[2006/13]
	French:	PROCEDE POUR CREER UN SYSTEME DE TRAITEMENT PARALLELE	[2006/13]
Entry into regional phase	23.12.2005	Translation filed
	23.12.2005	National basic fee paid
	23.12.2005	Search fee paid
	23.12.2005	Designation fee(s) paid
	23.12.2005	Examination fee paid
Examination procedure	23.12.2005	Examination requested [2006/13]
	24.03.2011	Despatch of a communication from the examining division (Time limit: M04)
	13.07.2011	Reply to a communication from the examining division
	07.05.2014	Despatch of a communication from the examining division (Time limit: M04)
	18.09.2014	Application deemed to be withdrawn, date of legal effect [2015/09]
	14.10.2014	Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time [2015/09]
Divisional application(s)	The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is 24.03.2011
Fees paid	Renewal fee
	29.06.2006	Renewal fee patent year 03
	29.06.2007	Renewal fee patent year 04
	28.11.2008	Renewal fee patent year 05
	29.06.2009	Renewal fee patent year 06
	29.06.2010	Renewal fee patent year 07
	29.06.2011	Renewal fee patent year 08
	28.06.2012	Renewal fee patent year 09
	27.06.2013	Renewal fee patent year 10
	Penalty fee
	Additional fee for renewal fee
	30.06.2008	05 M06 Fee paid on 28.11.2008
	30.06.2014	11 M06 Not yet paid
Opt-out from the exclusive Tooltip competence of the Unified Patent Court	See the Register of the Unified Patent Court for opt-out data
	Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:	Search	[X]CA2448549 (IP FLEX INC [JP]) [X] 1-14 * page 40, line L - page 49, line 15 *;
		[APD]EP1416388 (IP FLEX INC [JP]) [APD] 1-14 * abstract, figure 3, page 3, lines 5-34, page 4, lines 37-45, page 6, lines 5-20, page 7, line 36-page 8, line 39, page 16, lines 43-53, page 17, line 46-page 18, line 12, * * page 19, lines 11-14, page 20, lines 32-36, page 21, lines 9-15,page 21, lines 48-51, page 21, lines 9-15,page 21, lines 48-51, page 22, lines 31-37, page 23, lines 11-12, page 23, lines 40-42 *;
		[X] - CRONQUIST D C ET AL, "Architecture design of reconfigurable pipelined datapaths", ADVANCED RESEARCH IN VLSI, 1999. PROCEEDINGS. 20TH ANNIVERSARY CONFERENCE ON ATLANTA, GA, USA 21-24 MARCH 1999, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, ISBN 0-7695-0056-0, (19990321), pages 23 - 40, URL: http://ieeexplore.ieee.org/iel5/6125/16373/00756035.pdf?isnumber=&arnumber=756035, (20060726), XP010329009 [X] 1-14 * abstract *
		[X] - CRONQUIST D C ET AL, "Specifying and compiling applications for RaPiD", FPGAS FOR CUSTOM COMPUTING MACHINES, 1998. PROCEEDINGS. IEEE SYMPOSIUM ON NAPA VALLEY, CA, USA 15-17 APRIL 1998, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, (19980415), ISBN 0-8186-8900-5, pages 116 - 125, XP010298177 [X] 1-14 * sections 3 and 4 * DOI: http://dx.doi.org/10.1109/FPGA.1998.707889
		[A] - BABB J ET AL, "The RAW benchmark suite: computation structures for general purpose computing", FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, 1997. PROCEEDINGS., THE 5TH ANNUAL IEEE SYMPOSIUM ON NAPA VALLEY, CA, USA 16-18 APRIL 1997, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, (19970416), ISBN 0-8186-8159-4, pages 134 - 143, XP010247476 [A] 1-14 * abstract * DOI: http://dx.doi.org/10.1109/FPGA.1997.624613
		[A] - HAUSER J R WAWRZYNEK, "Garp: a MIPS processor with a reconfigurable coprocessor", FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, 1997. PROCEEDINGS., THE 5TH ANNUAL IEEE SYMPOSIUM ON NAPA VALLEY, CA, USA 16-18 APRIL 1997, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, (19970416), ISBN 0-8186-8159-4, pages 24 - 33, XP002955712 [A] 1-14 * the whole document *
		[X] - CHEN D C ET AL, "A RECONFIGURABLE MULTIPROCESSOR IC FOR RAPID PROTOTYPING OF ALGORITHMIC-SPECIFIC HIGH-SPED DSP DATA PATHS", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, US, (19921201), vol. 27, no. 12, ISSN 0018-9200, pages 1895 - 1904, XP000329042 [X] 1-14 * sections II B and IV C * DOI: http://dx.doi.org/10.1109/4.173120
		[A] - CHEN D C ET AL, "An integrated system for rapid prototyping of high performance algorithm specific data paths", APPLICATION SPECIFIC ARRAY PROCESSORS, 1992. PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON BERKELEY, CA, USA 4-7 AUG. 1992, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, (19920804), ISBN 0-8186-2967-3, pages 134 - 148, XP010030428 [A] 1-14 * abstract * DOI: http://dx.doi.org/10.1109/ASAP.1992.218576
		[A] - MIRSKY E ET AL, "MATRIX: a reconfigurable computing architecture with configurable instruction distribution and deployable resources", FPGAS FOR CUSTOM COMPUTING MACHINES, 1996. PROCEEDINGS. IEEE SYMPOSIUM ON NAPA VALLEY, CA, USA 17-19 APRIL 1996, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, (19960417), ISBN 0-8186-7548-9, pages 157 - 166, XP010206378 [A] 1-14 * abstract * DOI: http://dx.doi.org/10.1109/FPGA.1996.564808
		[A] - SINGH H ET AL, "Morphosys: An Integrated Reconfigurable System for Data-Parallel and Computation Intensive Applications", IEEE TRANSACTIONS ON COMPUTERS, IEEE SERVICE CENTER, LOS ALAMITOS, CA, US, (20000501), vol. 49, no. 5, ISSN 0018-9340, pages 465 - 474, XP002371128 [A] 1-14 * section 6; page 474, paragraph L; figure 10 * DOI: http://dx.doi.org/10.1109/12.859540
		[A] - COMPTON K HAUCK, "Reconfigurable computing: A survey of systems and software", ACM COMPUTING SURVEYS, ACM, NEW YORK, NY, US, US, (200206), vol. 34, no. 2, ISSN 0360-0300, page 171AND210, XP002957662 [A] 1-14 * the whole document * DOI: http://dx.doi.org/10.1145/508352.508353
	International search	[A] - SUEYOSHI T., "Reconfigurable computing system no genjo to kadai -computer evolution e mukete-", THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS GIJUTSU KENKYU HOKOKU, (19961213), vol. 96, no. 426, pages 111 - 118, XP002984910

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