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Extract from the Register of European Patents

EP About this file: EP1697994

EP1697994 - TRANSISTOR GATE ELECTRODE HAVING CONDUCTOR MATERIAL LAYER AND METHOD OF FABRICATION [Right-click to bookmark this link]
Former [2006/36]TRANSISTOR GATE ELECTRODE HAVING CONDUCTOR MATERIAL LAYER
[2009/23]
StatusNo opposition filed within time limit
Status updated on  01.10.2010
Database last updated on 28.09.2024
Most recent event   Tooltip30.09.2011Lapse of the patent in a contracting state
New state(s): TR
published on 02.11.2011  [2011/44]
Applicant(s)For all designated states
Intel Corporation
2200 Mission College Boulevard
Santa Clara, CA 95054 / US
[N/P]
Former [2006/36]For all designated states
Intel Corporation
2200 Mission College Boulevard
Santa Clara, CA 95052 / US
Inventor(s)01 / MURPHY, Anand
10934 NW Lucerne Court
Portland, OR 97229 / US
02 / BOYANOV, Boyan
15760 NW Rondos Drive
Portland, OR 97229 / US
03 / DATTA, Suman
16659 NW Talkingstick Way
Beaverton, OR 97006 / US
04 / DOYLE, Brian, S.
11156 NW Montreux Lane
Portland, OR 97224 / US
05 / JIN, Been-Yih
2922 NW Norwalk Place
Beaverton, OR 97006 / US
06 / YU, Shaofeng
5720 Cedar Grove Circle
Plano, TX 75093 / US
07 / CHAU, Robert
8875 SW 171st Avenue
Beaverton, OR 97007 / US
 [2006/36]
Representative(s)Goddar, Heinz J.
Boehmert & Boehmert
Anwaltspartnerschaft mbB
Pettenkoferstrasse 22
80336 München / DE
[N/P]
Former [2008/44]Goddar, Heinz J.
Forrester & Boehmert Pettenkoferstrasse 20-22
80336 München / DE
Former [2006/36]Goddar, Heinz J.
Forrester & Boehmert Anwaltssozietät Pettenkoferstrasse 20-22
D-80336 München / DE
Application number, filing date04815678.022.12.2004
[2006/36]
WO2004US43663
Priority number, dateUS2003074597824.12.2003         Original published format: US 745978
[2006/36]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2005067055
Date:21.07.2005
Language:EN
[2005/29]
Type: A1 Application with search report 
No.:EP1697994
Date:06.09.2006
Language:EN
The application published by WIPO in one of the EPO official languages on 21.07.2005 takes the place of the publication of the European patent application.
[2006/36]
Type: B1 Patent specification 
No.:EP1697994
Date:25.11.2009
Language:EN
[2009/48]
Search report(s)International search report - published on:EP21.07.2005
ClassificationIPC:H01L29/10, H01L29/49, H01L21/28, H01L21/8238, H01L21/8234
[2006/36]
CPC:
H01L29/1054 (EP,US); H01L21/18 (KR); H01L21/823807 (EP,US);
H01L21/823814 (EP,US); H01L21/823842 (EP,US); H01L21/823857 (EP,US);
H01L29/66636 (EP,US); H01L29/7842 (EP,US); H01L29/7848 (EP,US);
B82Y40/00 (KR) (-)
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   MC,   NL,   PL,   PT,   RO,   SE,   SI,   SK,   TR [2006/36]
Extension statesALNot yet paid
BANot yet paid
HRNot yet paid
LVNot yet paid
MKNot yet paid
YUNot yet paid
TitleGerman:TRANSISTOR-GATE-ELEKTRODE MIT LEITER-MATERIALSCHICHT UND HERSTELLUNGSVERFAHREN[2009/23]
English:TRANSISTOR GATE ELECTRODE HAVING CONDUCTOR MATERIAL LAYER AND METHOD OF FABRICATION[2009/23]
French:ELECTRODE DE GRILLE DE TRANSISTOR, COMPORTANT UNE COUCHE DE MATERIAU CONDUCTEUR ET PROCEDE DE FABRICATION[2009/23]
Former [2006/36]TRANSISTOR-GATE-ELEKTRODE MIT LEITER-MATERIALSCHICHT
Former [2006/36]TRANSISTOR GATE ELECTRODE HAVING CONDUCTOR MATERIAL LAYER
Former [2006/36]ELECTRODE DE GRILLE DE TRANSISTOR, COMPORTANT UNE COUCHE DE MATERIAU CONDUCTEUR
Entry into regional phase13.04.2006National basic fee paid 
13.04.2006Designation fee(s) paid 
13.04.2006Examination fee paid 
Examination procedure13.04.2006Examination requested  [2006/36]
28.12.2006Despatch of a communication from the examining division (Time limit: M06)
09.07.2007Reply to a communication from the examining division
07.05.2008Despatch of a communication from the examining division (Time limit: M06)
11.11.2008Reply to a communication from the examining division
12.06.2009Communication of intention to grant the patent
12.10.2009Fee for grant paid
12.10.2009Fee for publishing/printing paid
Divisional application(s)EP09012031.2  / EP2136404
Opposition(s)26.08.2010No opposition filed within time limit [2010/44]
Fees paidRenewal fee
13.12.2006Renewal fee patent year 03
12.12.2007Renewal fee patent year 04
14.03.2008Renewal fee patent year 05
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See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipAT25.11.2009
BE25.11.2009
CY25.11.2009
CZ25.11.2009
DK25.11.2009
EE25.11.2009
FI25.11.2009
IT25.11.2009
LT25.11.2009
NL25.11.2009
PL25.11.2009
RO25.11.2009
SE25.11.2009
SI25.11.2009
SK25.11.2009
TR25.11.2009
IE22.12.2009
LU22.12.2009
CH31.12.2009
LI31.12.2009
FR25.01.2010
BG25.02.2010
GR26.02.2010
ES08.03.2010
IS25.03.2010
PT25.03.2010
HU26.05.2010
MC01.07.2010
[2011/44]
Former [2011/32]AT25.11.2009
BE25.11.2009
CY25.11.2009
CZ25.11.2009
DK25.11.2009
EE25.11.2009
FI25.11.2009
IT25.11.2009
LT25.11.2009
NL25.11.2009
PL25.11.2009
RO25.11.2009
SE25.11.2009
SI25.11.2009
SK25.11.2009
IE22.12.2009
LU22.12.2009
CH31.12.2009
LI31.12.2009
FR25.01.2010
BG25.02.2010
GR26.02.2010
ES08.03.2010
IS25.03.2010
PT25.03.2010
HU26.05.2010
MC01.07.2010
Former [2011/21]AT25.11.2009
BE25.11.2009
CY25.11.2009
CZ25.11.2009
DK25.11.2009
EE25.11.2009
FI25.11.2009
IT25.11.2009
LT25.11.2009
NL25.11.2009
PL25.11.2009
RO25.11.2009
SE25.11.2009
SI25.11.2009
SK25.11.2009
IE22.12.2009
LU22.12.2009
CH31.12.2009
LI31.12.2009
BG25.02.2010
GR26.02.2010
ES08.03.2010
IS25.03.2010
PT25.03.2010
MC01.07.2010
Former [2011/15]AT25.11.2009
BE25.11.2009
CY25.11.2009
CZ25.11.2009
DK25.11.2009
EE25.11.2009
FI25.11.2009
IT25.11.2009
LT25.11.2009
NL25.11.2009
PL25.11.2009
RO25.11.2009
SE25.11.2009
SI25.11.2009
SK25.11.2009
IE22.12.2009
CH31.12.2009
LI31.12.2009
BG25.02.2010
GR26.02.2010
ES08.03.2010
IS25.03.2010
PT25.03.2010
MC01.07.2010
Former [2010/51]AT25.11.2009
BE25.11.2009
CY25.11.2009
CZ25.11.2009
DK25.11.2009
EE25.11.2009
FI25.11.2009
LT25.11.2009
NL25.11.2009
PL25.11.2009
RO25.11.2009
SE25.11.2009
SI25.11.2009
SK25.11.2009
IE22.12.2009
CH31.12.2009
LI31.12.2009
BG25.02.2010
GR26.02.2010
ES08.03.2010
IS25.03.2010
PT25.03.2010
MC01.07.2010
Former [2010/46]AT25.11.2009
BE25.11.2009
CY25.11.2009
CZ25.11.2009
DK25.11.2009
EE25.11.2009
FI25.11.2009
LT25.11.2009
NL25.11.2009
PL25.11.2009
RO25.11.2009
SE25.11.2009
SI25.11.2009
SK25.11.2009
IE22.12.2009
BG25.02.2010
GR26.02.2010
ES08.03.2010
IS25.03.2010
PT25.03.2010
MC01.07.2010
Former [2010/39]AT25.11.2009
BE25.11.2009
CY25.11.2009
CZ25.11.2009
DK25.11.2009
EE25.11.2009
FI25.11.2009
LT25.11.2009
NL25.11.2009
PL25.11.2009
RO25.11.2009
SE25.11.2009
SI25.11.2009
SK25.11.2009
BG25.02.2010
ES08.03.2010
IS25.03.2010
PT25.03.2010
MC01.07.2010
Former [2010/36]AT25.11.2009
BE25.11.2009
CY25.11.2009
CZ25.11.2009
DK25.11.2009
EE25.11.2009
FI25.11.2009
LT25.11.2009
NL25.11.2009
PL25.11.2009
RO25.11.2009
SE25.11.2009
SI25.11.2009
BG25.02.2010
ES08.03.2010
IS25.03.2010
PT25.03.2010
MC01.07.2010
Former [2010/33]AT25.11.2009
BE25.11.2009
CY25.11.2009
FI25.11.2009
LT25.11.2009
NL25.11.2009
PL25.11.2009
SE25.11.2009
SI25.11.2009
ES08.03.2010
IS25.03.2010
PT25.03.2010
Former [2010/31]AT25.11.2009
BE25.11.2009
CY25.11.2009
FI25.11.2009
LT25.11.2009
PL25.11.2009
SE25.11.2009
SI25.11.2009
IS25.03.2010
PT25.03.2010
Former [2010/30]AT25.11.2009
CY25.11.2009
FI25.11.2009
LT25.11.2009
PL25.11.2009
SE25.11.2009
SI25.11.2009
IS25.03.2010
PT25.03.2010
Former [2010/25]CY25.11.2009
FI25.11.2009
LT25.11.2009
PL25.11.2009
SE25.11.2009
SI25.11.2009
IS25.03.2010
PT25.03.2010
Former [2010/23]FI25.11.2009
LT25.11.2009
PL25.11.2009
SE25.11.2009
SI25.11.2009
IS25.03.2010
PT25.03.2010
Former [2010/22]FI25.11.2009
LT25.11.2009
SE25.11.2009
IS25.03.2010
PT25.03.2010
Former [2010/21]LT25.11.2009
SE25.11.2009
IS25.03.2010
PT25.03.2010
Cited inInternational search[A]US6111267  (FISCHER HERMANN [DE], et al) [A] 1 * figure 2 *;
 [Y]US2002105015  (KUBO MINORU [JP], et al) [Y] 5,14 * figure 1 *;
 [A]US2003227013  (CURRIE MATTHEW T [US], et al) [A] 1* figure 8 *;
 [XY]  - WU D ET AL, "A NOVEL STRAINED SI0.7GE0.3 SURFACE-CHANNEL PMOSFET WITH AN ALD TIN/AL2O3/HFALOX/AL2O3 GATE STACK", IEEE ELECTRON DEVICE LETTERS, IEEE INC. NEW YORK, US, (200303), vol. 24, no. 3, ISSN 0741-3106, pages 171 - 173, XP001169959 [X] 1-4,7-15,22-24 * figure 1 * [Y] 5,14

DOI:   http://dx.doi.org/10.1109/LED.2003.809524
 [A]  - RITENOUR A ET AL, "Epitaxial Strained Germanium p-MOSFETs with HfO2 Gate Dielectric and TaN Gate Electrode", INTERNATIONAL ELECTRON DEVICES MEETING 2003. IEDM. TECHNICAL DIGEST. WASHINGTON, DC, DEC 8 - 10, 2003, NEW YORK, NY : IEEE, US, (20031208), ISBN 0-7803-7872-5, pages 433 - 436, XP010684045 [A] 1 * figure 1 *
ExaminationWO0193338
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.