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Extract from the Register of European Patents

EP About this file: EP1583143

EP1583143 - Method of fabricating self-aligned source and drain contacts in a Double gate FET with controlled manufacturing of a thin Si or non-Si channel [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  10.08.2012
Database last updated on 02.09.2024
Most recent event   Tooltip10.08.2012No opposition filed within time limitpublished on 12.09.2012  [2012/37]
Applicant(s)For all designated states
IMEC
Kapeldreef 75
3001 Leuven / BE
For all designated states
NXP B.V.
High Tech Campus 60
5656 AG Eindhoven / NL
[2009/33]
Former [2009/11]For all designated states
Interuniversitair Micro-Elektronica Centrum
Kapeldreef 75
3001 Leuven / BE
For all designated states
NXP B.V.
High Tech Campus 60
5656 AG Eindhoven / NL
Former [2005/40]For all designated states
Interuniversitair Micro-Elektronica Centrum
Kapeldreef 75
3001 Leuven / BE
For all designated states
Koninklijke Philips Electronics, N.V.
Groenewoudseweg 1
5621 BA Eindhoven / NL
Inventor(s)01 / Ponomarev, Youri V.
Naamsesteenweg 501
3001 Leuven / BE
02 / Loo, Josine Johanna Gerarda Petra
Groenstraat 12/2003
3001 Leuven / BE
 [2005/40]
Representative(s)Bird, Ariane, et al
Bird Goën & Co
Wetenschapspark Arenberg
Gaston Geenslaan 9
3001 Heverlee / BE
[N/P]
Former [2005/40]Bird, Ariane, et al
Bird Goen & Co, Klein Dalenstraat 42A
3020 Winksele / BE
Application number, filing date05003842.123.02.2005
[2005/40]
Priority number, dateEP2004010129129.03.2004         Original published format: EP 04101291
[2005/40]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP1583143
Date:05.10.2005
Language:EN
[2005/40]
Type: A3 Search report 
No.:EP1583143
Date:11.06.2008
[2008/24]
Type: B1 Patent specification 
No.:EP1583143
Date:05.10.2011
Language:EN
[2011/40]
Search report(s)(Supplementary) European search report - dispatched on:EP15.05.2008
ClassificationIPC:H01L21/336, H01L29/786
[2005/40]
CPC:
H01L29/78696 (EP); B82Y10/00 (EP); H01L21/76897 (EP);
H01L29/0665 (EP); H01L29/0673 (EP); H01L29/66265 (EP);
H01L29/66742 (EP); H01L29/7317 (EP); H01L29/78645 (EP) (-)
Designated contracting statesDE,   FR,   GB [2009/08]
Former [2005/40]AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HU,  IE,  IS,  IT,  LI,  LT,  LU,  MC,  NL,  PL,  PT,  RO,  SE,  SI,  SK,  TR 
TitleGerman:Methode zur Herstellung von selbst-justierten Source/Drain-Kontakten in einem Doppel-Gate-FET unter kontrollierter Herstellung eines dünnen Si- oder Nicht-Si-Kanals[2005/40]
English:Method of fabricating self-aligned source and drain contacts in a Double gate FET with controlled manufacturing of a thin Si or non-Si channel[2005/40]
French:Méthode pour la fabrication de contacts source/drain auto-alignés dans un FET à double grille avec un contrôle du procédé de fabrication d'un canal mince avec ou sans silicium[2005/40]
Examination procedure01.12.2008Examination requested  [2009/08]
12.12.2008Loss of particular rights, legal effect: designated state(s)
16.02.2009Despatch of communication of loss of particular rights: designated state(s) AT, BE, BG, CH, CY, CZ, DK, EE, ES, FI, GR, HU, IE, IS, IT, LT, LU, MC, NL, PL, PT, RO, SE, SI, SK, TR
25.06.2010Despatch of a communication from the examining division (Time limit: M06)
27.12.2010Reply to a communication from the examining division
10.02.2011Communication of intention to grant the patent
06.06.2011Fee for grant paid
06.06.2011Fee for publishing/printing paid
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is  25.06.2010
Opposition(s)06.07.2012No opposition filed within time limit [2012/37]
Fees paidRenewal fee
15.01.2007Renewal fee patent year 03
13.02.2008Renewal fee patent year 04
24.02.2009Renewal fee patent year 05
24.02.2010Renewal fee patent year 06
23.02.2011Renewal fee patent year 07
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Documents cited:Search[XA]US6214693  (KOMATSU HIROSHI [JP]) [X] 13,14 * figure 6B * [A] 1-12;
 [XA]WO03083934  (ADVANCED MICRO DEVICES INC [US]) [X] 13,14 * figure 1 * [A] 1-12;
 [XA]JP2003309267  (TOSHIBA CORP) [X] 13,14 * abstract * [A] 1-12;
 US2004222471  [ ] (INOH KAZUMI [JP]) [ ] * figures 1A-1F,6I *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.