blank Quick help
blank Maintenance news

Scheduled maintenance

Regular maintenance outages:
between 05.00 and 05.15 hrs CET (Monday to Sunday).

Other outages
Availability
Register Forum

2022.02.11

More...
blank News flashes

News flashes

New version of the European Patent Register - SPC information for Unitary Patents.

2024-03-06

More...
blank Related links

Release notes
European Patent Register Assistant
European Patent Register Resource Book
European Patent Register – pocket guide
FAQ - European Patent Register
FAQ - Register Alert
Federated Register (Flyer)
Global Dossier (Flyer)
Register events
Deep link coverage
Federated Register content
The Patent Information Tour
Fair use charter

Extract from the Register of European Patents

EP About this file: EP1786026

EP1786026 - Method of fabricating first and second separate active semiconductor zones and use for the fabrication of CMOS structures. [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  06.06.2014
Database last updated on 24.04.2024
Most recent event   Tooltip24.07.2015Lapse of the patent in a contracting state
New state(s): BG, HU, LU		published on 26.08.2015  [2015/35]
Applicant(s)For all designated states
Commissariat à l'Énergie Atomique et aux Énergies Alternatives
Bâtiment "Le Ponant D" 25, rue Leblanc
75015 Paris / FR
For all designated states
STMICROELECTRONICS S.A.
29 Boulevard Romain Rolland
92120 Montrouge / FR
[2013/31]
Former [2010/25]For all designated states
Commissariat à l'Énergie Atomique et aux Énergies Alternatives
Bâtiment "Le Ponant D" 25, rue Leblanc
75015 Paris / FR
For all designated states
ST MICROELECTRONICS S.A.
29 Boulevard Romain Rolland
92120 Montrouge / FR
Former [2007/20]For all designated states
COMMISSARIAT A L'ENERGIE ATOMIQUE
25, rue Leblanc Immeuble "Le Ponant D"
75015 Paris / FR
For all designated states
ST MICROELECTRONICS S.A.
29 Boulevard Romain Rolland
92120 Montrouge / FR
Inventor(s)01 / Barbe, Jean-Charles
11 bis Allée de l'école Vaucanson
38100 Grenoble / FR
02 / Clavelier, Laurent
11 bis rue Victor Hugo
38700 Voiron / FR
03 / Vianay, Benoit
16 bis boulevard Maréchal Joffre
38000 Grenoble / FR
04 / Morand, Yves
16, rue Amédée Morel
38000 Grenoble / FR
 [2007/20]
Representative(s)Hecké, Gérard, et al
Cabinet Hecké
10, rue d'Arménie - Europole
BP 1537
38025 Grenoble Cedex 1 / FR
[N/P]
Former [2013/31]Hecké, Gérard, et al
Cabinet Hecké 10 rue d'Arménie - Europole BP 1537
38025 Grenoble Cedex 1 / FR
Former [2007/20]Hecké, Gérard, et al
Cabinet Hecké World Trade Center - Europole 5, Place Robert Schuman BP 1537
38025 Grenoble Cedex 1 / FR
Application number, filing date06354035.531.10.2006
[2007/20]
Priority number, dateFR2005001142409.11.2005         Original published format: FR 0511424
[2007/20]
Filing languageFR
Procedural languageFR
PublicationType: A1 Application with search report 
No.:EP1786026
Date:16.05.2007
Language:FR
[2007/20]
Type: B1 Patent specification 
No.:EP1786026
Date:31.07.2013
Language:FR
[2013/31]
Search report(s)(Supplementary) European search report - dispatched on:EP22.01.2007
ClassificationIPC:H01L21/20
[2007/20]
CPC:
H01L21/02667 (EP,US); H01L21/02381 (EP,US); H01L21/0245 (EP,US);
H01L21/02488 (EP,US); H01L21/02496 (EP,US); H01L21/02505 (EP,US);
H01L21/02532 (EP,US); H01L21/02598 (EP,US); H01L21/84 (EP,US);
H01L27/1203 (EP,US); H01L21/823807 (EP,US) (-)
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   NL,   PL,   PT,   RO,   SE,   SI,   SK,   TR [2007/20]
TitleGerman:Verfahren zum Herstellen von ersten und zweiten unterschiedlichen, aktiven Halbleiterzonen und Verwendung für die Herstellung von CMOS-Strukturen[2007/20]
English:Method of fabricating first and second separate active semiconductor zones and use for the fabrication of CMOS structures.[2007/20]
French:Procédé de réalisation de premières et secondes zones actives semi-conductrices distinctes et utilisation pour la fabrication de structures de type C-MOS[2007/20]
Examination procedure08.09.2007Amendment by applicant (claims and/or description)
08.09.2007Examination requested  [2007/43]
13.03.2013Communication of intention to grant the patent
14.06.2013Fee for grant paid
14.06.2013Fee for publishing/printing paid
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is  13.03.2013
Opposition(s)02.05.2014No opposition filed within time limit [2014/28]
Fees paidRenewal fee
10.10.2008Renewal fee patent year 03
27.10.2009Renewal fee patent year 04
25.10.2010Renewal fee patent year 05
20.10.2011Renewal fee patent year 06
19.09.2012Renewal fee patent year 07
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court		 See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipHU31.10.2006
AT31.07.2013
BG31.07.2013
CY31.07.2013
CZ31.07.2013
DK31.07.2013
EE31.07.2013
ES31.07.2013
FI31.07.2013
IT31.07.2013
LT31.07.2013
LV31.07.2013
MC31.07.2013
NL31.07.2013
PL31.07.2013
RO31.07.2013
SE31.07.2013
SI31.07.2013
SK31.07.2013
TR31.07.2013
BE31.10.2013
CH31.10.2013
IE31.10.2013
LI31.10.2013
LU31.10.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
[2015/34]
Former [2015/32]AT31.07.2013
CY31.07.2013
CZ31.07.2013
DK31.07.2013
EE31.07.2013
ES31.07.2013
FI31.07.2013
IT31.07.2013
LT31.07.2013
LV31.07.2013
MC31.07.2013
NL31.07.2013
PL31.07.2013
RO31.07.2013
SE31.07.2013
SI31.07.2013
SK31.07.2013
TR31.07.2013
BE31.10.2013
CH31.10.2013
IE31.10.2013
LI31.10.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/48]AT31.07.2013
CY31.07.2013
CZ31.07.2013
DK31.07.2013
EE31.07.2013
ES31.07.2013
FI31.07.2013
IT31.07.2013
LT31.07.2013
LV31.07.2013
MC31.07.2013
NL31.07.2013
PL31.07.2013
RO31.07.2013
SE31.07.2013
SI31.07.2013
SK31.07.2013
BE31.10.2013
CH31.10.2013
IE31.10.2013
LI31.10.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/41]AT31.07.2013
CY31.07.2013
CZ31.07.2013
DK31.07.2013
EE31.07.2013
ES31.07.2013
FI31.07.2013
IT31.07.2013
LT31.07.2013
LV31.07.2013
MC31.07.2013
NL31.07.2013
PL31.07.2013
RO31.07.2013
SE31.07.2013
SI31.07.2013
SK31.07.2013
BE31.10.2013
CH31.10.2013
LI31.10.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/34]AT31.07.2013
CY31.07.2013
CZ31.07.2013
DK31.07.2013
EE31.07.2013
ES31.07.2013
FI31.07.2013
IT31.07.2013
LT31.07.2013
LV31.07.2013
MC31.07.2013
NL31.07.2013
PL31.07.2013
RO31.07.2013
SE31.07.2013
SI31.07.2013
SK31.07.2013
CH31.10.2013
LI31.10.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/25]AT31.07.2013
CY31.07.2013
CZ31.07.2013
DK31.07.2013
EE31.07.2013
ES31.07.2013
FI31.07.2013
IT31.07.2013
LT31.07.2013
LV31.07.2013
MC31.07.2013
NL31.07.2013
PL31.07.2013
RO31.07.2013
SE31.07.2013
SI31.07.2013
SK31.07.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/24]AT31.07.2013
CY31.07.2013
CZ31.07.2013
DK31.07.2013
EE31.07.2013
ES31.07.2013
FI31.07.2013
IT31.07.2013
LT31.07.2013
LV31.07.2013
NL31.07.2013
PL31.07.2013
RO31.07.2013
SE31.07.2013
SI31.07.2013
SK31.07.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/23]AT31.07.2013
CY31.07.2013
CZ31.07.2013
DK31.07.2013
EE31.07.2013
FI31.07.2013
LT31.07.2013
LV31.07.2013
NL31.07.2013
PL31.07.2013
RO31.07.2013
SE31.07.2013
SI31.07.2013
SK31.07.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/22]AT31.07.2013
CY31.07.2013
DK31.07.2013
FI31.07.2013
LT31.07.2013
LV31.07.2013
NL31.07.2013
PL31.07.2013
RO31.07.2013
SE31.07.2013
SI31.07.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/21]AT31.07.2013
CY31.07.2013
DK31.07.2013
FI31.07.2013
LT31.07.2013
LV31.07.2013
NL31.07.2013
PL31.07.2013
SE31.07.2013
SI31.07.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/18]AT31.07.2013
CY31.07.2013
FI31.07.2013
LT31.07.2013
LV31.07.2013
NL31.07.2013
PL31.07.2013
SE31.07.2013
SI31.07.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/14]CY17.07.2013
AT31.07.2013
FI31.07.2013
LT31.07.2013
LV31.07.2013
NL31.07.2013
PL31.07.2013
SE31.07.2013
SI31.07.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/12]CY17.07.2013
AT31.07.2013
FI31.07.2013
LT31.07.2013
LV31.07.2013
PL31.07.2013
SE31.07.2013
SI31.07.2013
GR01.11.2013
IS30.11.2013
PT02.12.2013
Former [2014/11]CY17.07.2013
AT31.07.2013
FI31.07.2013
LT31.07.2013
PL31.07.2013
SE31.07.2013
IS30.11.2013
PT02.12.2013
Former [2014/10]CY17.07.2013
AT31.07.2013
LT31.07.2013
SE31.07.2013
IS30.11.2013
PT02.12.2013
Former [2014/09]AT31.07.2013
LT31.07.2013
SE31.07.2013
PT02.12.2013
Former [2014/08]LT31.07.2013
PT02.12.2013
Documents cited:Search[A]US4751561  (JASTRZEBSKI LUBOMIR L [US]) [A] 1 * figures 1-5 *;
 [XY]US5514885  (MYRICK JAMES J [US]) [X] 1-6,9-13 * column 7, line 39 - column 10, line 16; figures 6,7,10 * [Y] 14;
 [Y]US2002019105  (HATTORI NOBUYOSHI [JP], et al) [Y] 14 * paragraphs [0124] , [0125]; figure 17 *;
 [A]US2002140033  (BAE GEUM-JONG [KR], et al) [A] 1 * figures 6-12 *;
 [A]  - YAOCHENG LIU ET AL, "MOSFETs and high-speed photodetectors on ge-on-insulator substrates fabricated using rapid melt growth", ELECTRON DEVICES MEETING, 2004. IEDM TECHNICAL DIGEST. SAN FRANCISCO, CA, USA DEC. 13-15, 2004, PISCATAWAY, NJ, USA, (20041213), ISBN 0-7803-8684-1, pages 1001 - 1004, XP010788979 [A] 1 * figure 1 *

DOI:   http://dx.doi.org/10.1109/IEDM.2004.1419357
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.