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EP About this file: EP1894106

EP1894106 - MEMORY CONTROLLER AND METHOD FOR COUPLING A NETWORK AND A MEMORY [Right-click to bookmark this link]
Status	The application is deemed to be withdrawn Status updated on 18.11.2011 Database last updated on 03.09.2024
Most recent event Tooltip	18.11.2011	Application deemed to be withdrawn	published on 21.12.2011 [2011/51]
Applicant(s)	For all designated states NXP B.V. High Tech Campus 60 5656 AG Eindhoven / NL
	[2008/10]
Inventor(s)	01 / BURCHARD, Artur C/o Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL
	02 / HEKSTRA-NOWACKA, Ewa C/o Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL
	03 / CHAUHAN, Atul, P., S. C/o Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL
	[2008/10]
Representative(s)	Schouten, Marcus Maria, et al NXP B.V. Intellectual Property & Licensing High Tech Campus 60 5656 AG Eindhoven / NL
	[N/P]
Former [2009/44]	Schouten, Marcus Maria, et al NXP B.V. IP & L Department High Tech Campus 32 5656 AE Eindhoven / NL
Former [2008/33]	van der Veer, Johannis Leendert, et al NXP Semiconductors B.V. IP&L Department High Tech Campus 32 5656 AE Eindhoven / NL
Former [2008/22]	van der Veer, Johannis Leendert, et al NXP Semiconductors B.V. IP Department High Tech Campus 32 5656 AE Eindhoven / NL
Former [2008/10]	Schneider, Michael NXP Semiconductors IP Department Gutheil-Schoder-Gasse 8-12 1100 Wien / AT
Application number, filing date	06756095.3	09.06.2006
	[2008/10]
	WO2006IB51837
Priority number, date	EP20050105082	09.06.2005 Original published format: EP 05105082
	[2008/10]
Filing language	EN
Procedural language	EN
Publication	Type:	A2 Application without search report
	No.:	WO2006131899
	Date:	14.12.2006
	Language:	EN
	[2006/50]
	Type:	A2 Application without search report
	No.:	EP1894106
	Date:	05.03.2008
	Language:	EN
	The application published by WIPO in one of the EPO official languages on 14.12.2006 takes the place of the publication of the European patent application.
	[2008/10]
Search report(s)	International search report - published on:	EP	26.04.2007
Classification	IPC:	G06F13/16	[2008/10]
	CPC:	G06F13/1673 (EP,US)
Designated contracting states	AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LI, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR [2008/10]
Extension states	RS	09.01.2008
Title	German:	SPEICHERSTEUERUNG UND VERFAHREN ZUR VERBINDUNG EINES NETZES UND EINES SPEICHERS	[2008/10]
	English:	MEMORY CONTROLLER AND METHOD FOR COUPLING A NETWORK AND A MEMORY	[2008/10]
	French:	CONTROLEUR MEMOIRE ET PROCEDE DE COUPLAGE D'UN RESEAU ET D'UNE MEMOIRE	[2008/10]
Entry into regional phase	09.01.2008	National basic fee paid
	09.01.2008	Designation fee(s) paid
	09.01.2008	Examination fee paid
Examination procedure	09.01.2008	Examination requested [2008/10]
	19.04.2010	Despatch of a communication from the examining division (Time limit: M04)
	13.07.2010	Reply to a communication from the examining division
	21.02.2011	Communication of intention to grant the patent
	05.07.2011	Application deemed to be withdrawn, date of legal effect [2011/51]
	05.08.2011	Despatch of communication that the application is deemed to be withdrawn, reason: fee for grant / fee for printing not paid in time [2011/51]
Divisional application(s)	The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is 19.04.2010
Fees paid	Renewal fee
	30.06.2008	Renewal fee patent year 03
	30.06.2009	Renewal fee patent year 04
	30.06.2010	Renewal fee patent year 05
	Penalty fee
	Additional fee for renewal fee
	30.06.2011	06 M06 Not yet paid
Opt-out from the exclusive Tooltip competence of the Unified Patent Court	See the Register of the Unified Patent Court for opt-out data
	Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Cited in	International search	[E]WO2006134550 (KONINKL PHILIPS ELECTRONICS NV [NL], et al) [E] 1-7 * page 4, line 19 - line 29 * * page 8, line 5 - page 9, line 35 * * figures 3,4 *;
		[PX]WO2006059283 (KONINKL PHILIPS ELECTRONICS NV [NL], et al) [PX] 1-7 * page 9, line 22 - page 12, line 13 * * figures 3,5,6 *;
		[A]EP0982661 (XEROX CORP [US]) [A] 1-7 * abstract * * paragraph [0014] - paragraph [0017] * * paragraph [0028] *;
		[A]US2002046251 (SIEGEL SHEPARD L [US]) [A] 1-7 * abstract *;
		[X] - BURCHARD A ET AL, "A Real-Time Streaming Memory Controller", DESIGN, AUTOMATION AND TEST IN EUROPE, 2005. PROCEEDINGS MUNICH, GERMANY 07-11 MARCH 2005, PISCATAWAY, NJ, USA,IEEE, (20050307), ISBN 0-7695-2288-2, pages 20 - 25, XP010780220 [X] 1-7 * the whole document *
		[DA] - DE KOCK E A ET AL, "YAPI: APPLICATION MODELING FOR SIGNAL PROCESSING SYSTEMS", PROCEEDINGS OF THE DESIGN AUTOMATION CONFERENCE, XX, XX, (200006), pages 402 - 405, XP007900426
		[DA] - HENNESSY J L ET AL, "Computer Architecture. A Quantitative Approach passage", COMPUTER ARCHITECTURE. A QUANTITATIVE APPROACH, MORGAN KAUFMANN PUBLISHERS,, US, (2003), pages 435 - 442, XP002378280
	by applicant	- ARTUR BURCHARD; EWA HEKSTRA-NOWACKA; ATUL CHAUHAN, "A Real-Time Streaming Memory Controller", DESIGN, AUTOMATION AND TEST IN EUROPE, DATE'05, PROCEEDINGS MUNICH, (20050307), pages 20 - 25

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