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EP1929390
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EP About this file: EP1929390
| EP1929390 - SEMICONDUCTOR INTEGRATED CIRCUIT HAVING CURRENT LEAKAGE REDUCTION SCHEME [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 08.07.2016 Database last updated on 02.09.2024 | Most recent event Tooltip | 08.07.2016 | Application deemed to be withdrawn | published on 10.08.2016 [2016/32] | Applicant(s) | For all designated states Conversant Intellectual Property Management Inc. 390 March Road Suite 100 Ottawa, ON K2K 0G7 / CA | [2014/45] |
| Former [2010/34] | For all designated states MOSAID Technologies Inc. 11 Hines Road Suite 203 Ottawa, Ontario K2K 2X1 / CA | ||
| Former [2008/24] | For all designated states Mosaid Technologies Incorporated 11 Hines Road Kanata, ON K2K 2X1 / CA | Inventor(s) | 01 /
OH, HakJune 21 Cambior Crescent Kanata Ontario K2T 1J3 / CA | [2008/24] | Representative(s) | Uexküll & Stolberg Partnerschaft von Patent- und Rechtsanwälten mbB Beselerstrasse 4 22607 Hamburg / DE | [N/P] |
| Former [2008/34] | UEXKÜLL & STOLBERG Patentanwälte Beselerstrasse 4 22607 Hamburg / DE | ||
| Former [2008/24] | UEXKÜLL & STOLBERG Patentanwälte Beselerstrasse 4 22607 Hamburg / DE | Application number, filing date | 06790596.8 | 29.08.2006 | [2008/24] | WO2006CA01417 | Priority number, date | US20050238975 | 30.09.2005 Original published format: US 238975 | [2008/24] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO2007036020 | Date: | 05.04.2007 | Language: | EN | [2007/14] | Type: | A1 Application with search report | No.: | EP1929390 | Date: | 11.06.2008 | Language: | EN | The application published by WIPO in one of the EPO official languages on 05.04.2007 takes the place of the publication of the European patent application. | [2008/24] | Search report(s) | International search report - published on: | CA | 05.04.2007 | (Supplementary) European search report - dispatched on: | EP | 05.10.2012 | Classification | IPC: | H01L23/58, H01L27/00, H03K17/14, H03K19/0948, H03K19/00 | [2012/45] | CPC: |
H03K19/0016 (EP,US);
H03K17/14 (KR);
H01L23/58 (KR);
H01L27/00 (KR);
H03K19/0948 (KR);
H01L27/092 (EP,US);
H01L2924/0002 (EP,US)
(-)
| C-Set: |
H01L2924/0002, H01L2924/00 (EP,US)
|
| Former IPC [2008/24] | G05F1/10, H01L23/58, H01L27/00, H03K17/14, H03K19/0948 | Designated contracting states | AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LI, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR [2008/24] | Title | German: | INTEGRIERTE HALBLEITERSCHALTUNG MIT STROMLECK-REDUKTIONSSCHEMA | [2008/24] | English: | SEMICONDUCTOR INTEGRATED CIRCUIT HAVING CURRENT LEAKAGE REDUCTION SCHEME | [2008/24] | French: | CIRCUIT INTEGRE A SEMI-CONDUCTEUR QUI PRESENTE UN PLAN DE REDUCTION DE FUITE DE COURANT | [2008/24] | Entry into regional phase | 28.03.2008 | National basic fee paid | 28.03.2008 | Search fee paid | 28.03.2008 | Designation fee(s) paid | 28.03.2008 | Examination fee paid | Examination procedure | 28.03.2008 | Examination requested [2008/24] | 18.04.2013 | Amendment by applicant (claims and/or description) | 29.11.2013 | Despatch of a communication from the examining division (Time limit: M04) | 12.02.2014 | Reply to a communication from the examining division | 01.03.2016 | Application deemed to be withdrawn, date of legal effect [2016/32] | 31.03.2016 | Despatch of communication that the application is deemed to be withdrawn, reason: renewal fee not paid in time [2016/32] | Divisional application(s) | The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is 29.11.2013 | Fees paid | Renewal fee | 28.03.2008 | Renewal fee patent year 03 | 25.08.2009 | Renewal fee patent year 04 | 31.08.2010 | Renewal fee patent year 05 | 30.08.2011 | Renewal fee patent year 06 | 31.08.2012 | Renewal fee patent year 07 | 29.08.2013 | Renewal fee patent year 08 | 13.08.2014 | Renewal fee patent year 09 | Penalty fee | Additional fee for renewal fee | 31.08.2015 | 10 M06 Not yet paid |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]JPH04223711 (FUJITSU LTD) [X] 21 * the whole document *; | [XI]WO0016483 (INTEL CORP [US], et al) [X] 1-7,21 * the whole document * [I] 13-20; | [A]US6429683 (MILLER DARRIN C [US], et al) [A] 1-21* the whole document *; | [XP]US2006055424 (PARK CHUL-WOO [KR], et al) [XP] 1-21 * the whole document * | International search | [A]US5486774 (DOUSEKI TAKAKUNI [JP], et al); | [A]US6696865 (HORIGUCHI MASASHI [JP], et al); | [A] - HORIGUCHI M. ET AL., "Switched Source Impedance CMOS Circuit for Low Standby Sub-threshold Current Giga-Scale LSI's", IEEE JOURNAL OF SOLID-STATE CIRCUITS, (199311), vol. 28, no. 11, pages 1131 - 1135, XP000423257 DOI: http://dx.doi.org/10.1109/4.245593 | by applicant | JPH04223711 | US5486774 | WO0016483 | US6696865 | - "Switched-Source-Impedance CMOS Circuit for Low Standby Subthreshold Current Giga-Scale LSI's", IEEE JOURNAL OF SOLID-STATE CIRCUITS, (199311), vol. 28, no. 11, pages 1131 - 1135 |