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Extract from the Register of European Patents

EP About this file: EP2133909

EP2133909 - SEMICONDUCTOR DEVICE, AND ITS MANUFACTURING METHOD [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  20.10.2017
Database last updated on 14.06.2024
FormerExamination is in progress
Status updated on  03.02.2017
Most recent event   Tooltip20.10.2017Application deemed to be withdrawnpublished on 22.11.2017  [2017/47]
Applicant(s)For all designated states
Kabushiki Kaisha Toshiba
1-1 Shibaura 1-chome Minato-ku
Tokyo 105-8001 / JP
[2009/51]
Representative(s)Moreland, David, et al
Marks & Clerk LLP The Beacon
176 St Vincent Street
Glasgow G2 5SG / GB
[N/P]
Former [2009/51]Maury, Richard Philip
Marks & Clerk LLP 90 Long Acre London
WC2E 9RA / GB
Application number, filing date07832928.103.12.2007
[2009/51]
WO2007JP73308
Priority number, dateJP2007009685102.04.2007         Original published format: JP 2007096851
[2009/51]
Filing languageJA
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2008120418
Date:09.10.2008
Language:JA
[2008/41]
Type: A1 Application with search report 
No.:EP2133909
Date:16.12.2009
Language:EN
[2009/51]
Search report(s)International search report - published on:JP09.10.2008
(Supplementary) European search report - dispatched on:EP15.02.2011
ClassificationIPC:H01L21/338, H01L29/812, H01L21/768, H01L23/48
[2011/11]
CPC:
H01L29/772 (EP,US); H01L27/095 (KR); H01L21/18 (KR);
H01L21/76898 (EP,US); H01L23/481 (EP,US); H01L29/41758 (EP,US);
H01L29/812 (EP,US); H01L2224/48091 (EP,US); H01L2224/49175 (EP,US);
H01L2924/1305 (EP,US) (-)
C-Set:
H01L2224/48091, H01L2924/00014 (EP,US);
H01L2924/1305, H01L2924/00 (US,EP)
Former IPC [2009/51]H01L21/338, H01L21/3205, H01L23/52, H01L29/812
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MT,   NL,   PL,   PT,   RO,   SE,   SI,   SK,   TR [2009/51]
TitleGerman:HALBLEITERANORDNUNG UND VERFAHREN ZU IHRER HERSTELLUNG[2009/51]
English:SEMICONDUCTOR DEVICE, AND ITS MANUFACTURING METHOD[2009/51]
French:DISPOSITIF A SEMI-CONDUCTEUR ET SON PROCEDE DE FABRICATION[2009/51]
Entry into regional phase15.05.2009Translation filed 
15.05.2009National basic fee paid 
15.05.2009Search fee paid 
15.05.2009Designation fee(s) paid 
15.05.2009Examination fee paid 
Examination procedure15.05.2009Examination requested  [2009/51]
11.07.2011Amendment by applicant (claims and/or description)
03.02.2017Despatch of a communication from the examining division (Time limit: M04)
14.06.2017Application deemed to be withdrawn, date of legal effect  [2017/47]
06.07.2017Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time  [2017/47]
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is  03.02.2017
Fees paidRenewal fee
11.12.2009Renewal fee patent year 03
15.12.2010Renewal fee patent year 04
12.12.2011Renewal fee patent year 05
11.12.2012Renewal fee patent year 06
12.12.2013Renewal fee patent year 07
11.12.2014Renewal fee patent year 08
10.12.2015Renewal fee patent year 09
13.12.2016Renewal fee patent year 10
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[XI]US5343071  (KAZIOR THOMAS E [US], et al) [X] 1,2 * column 3, paragraph 6 - column 25, paragraph 14; figure 1 * [I] 4,5;
 [Y]US2006046471  (KIRBY KYLE K [US], et al) [Y] 1-6 * paragraphs [0009] , [0010] , [0036] - [0044]; figures 1-4 *;
 [Y]US5770513  (OKANIWA KAZUHIRO [JP]) [Y] 1-6 * column 1, lines 19-41; figures 15-18 * * column 9, lines 1-65 *;
 [Y]EP1693891  (IMEC INTER UNI MICRO ELECTR [BE]) [Y] 1,2,4,5 * figures 3-5 *
 [Y]  - KIAT T N ET AL, "A SUB-SURFACE METALLIZATION POST-PROCESS IC MODULE FOR RF TECHNOLOGY", PROCEEDINGS OF THE 2000 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING. ( BCTM ). MINNEAPOLIS, MN, SEPT. 24 - 26, 2000; [IEEE BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING], NEW YORK, NY : IEEE, US, (20000924), ISBN 978-0-7803-6385-4, pages 195 - 198, XP000977230 [Y] 3,6 * figure 1 *
International search[X]JPS62211962  (FUJITSU LTD);
 [X]JPS63278368  (NEC CORP);
 [X]JPH06326064  (NEC CORP);
 [A]JPH02307219  (OKI ELECTRIC IND CO LTD)
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.