Deutsch English Français

Contact

EP1978638

European procedure

Quick help

Maintenance news

Scheduled maintenance

Regular maintenance outages:
between 05.00 and 05.15 hrs CET (Monday to Sunday).

Other outages
Availability
Register Forum

2022.02.11

More...

News flashes

News Flashes

New version of the European Patent Register – SPC proceedings information in the Unitary Patent Register.

2024-07-24

More...

Extract from the Register of European Patents

EP About this file: EP1978638

EP1978638 - A negative gm circuit, a filter and low noise amplifier including such a filter [Right-click to bookmark this link]
Status	No opposition filed within time limit Status updated on 19.01.2018 Database last updated on 27.07.2024
Former	The patent has been granted Status updated on 10.02.2017
Former	Grant of patent is intended Status updated on 01.02.2017
Most recent event Tooltip	19.01.2018	No opposition filed within time limit	published on 21.02.2018 [2018/08]
Applicant(s)	For all designated states MediaTek Inc. No. 1, Dusing Rd. 1st. Science-Based Industrial Park Hsin-Chu 300 Taiwan / TW
	[N/P]
Former [2008/41]	For all designated states MediaTek, Inc No. 1, Dusing Rd. 1st. Science-Based Industrial Park Hsin-Chu 300 Taiwan / TW
Inventor(s)	01 / Beffa, Frederico A F via Redondello 23 6982 Agno, Ticino SE10 0QY / CH
	[2008/41]
Representative(s)	Rees, Simon John Lewis, et al Haseltine Lake LLP Redcliff Quay 120 Redcliff Street Bristol BS1 6HU / GB
	[2017/11]
Former [2009/31]	Rees, Simon John Lewis, et al Haseltine Lake LLP Redcliff Quay 120 Redcliff Street Bristol BS1 6HU / GB
Former [2008/41]	Beck, Simon Antony, et al Withers & Rogers LLP Goldings House 2 Hays Lane London SE1 2HW / GB
Application number, filing date	08250937.3	18.03.2008
	[2008/41]
Priority number, date	US20070784258	06.04.2007 Original published format: US 784258
	[2008/41]
Filing language	EN
Procedural language	EN
Publication	Type:	A2 Application without search report
	No.:	EP1978638
	Date:	08.10.2008
	Language:	EN
	[2008/41]
	Type:	A3 Search report
	No.:	EP1978638
	Date:	15.01.2014
	Language:	EN
	[2014/03]
	Type:	B1 Patent specification
	No.:	EP1978638
	Date:	15.03.2017
	Language:	EN
	[2017/11]
Search report(s)	(Supplementary) European search report - dispatched on:	EP	17.12.2013
Classification	IPC:	H03H11/52, H03F1/22	[2008/41]
	CPC:	H03H11/52 (EP,US); H03F1/223 (EP,US); H03F1/56 (EP,US); H03F3/19 (EP,US); H03F2200/294 (EP,US); H03F2200/451 (EP,US); (+) H03H2011/0488 (EP) (-)
Designated contracting states	DE, FR, GB [2014/18]
Former [2008/41]	AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MT, NL, NO, PL, PT, RO, SE, SI, SK, TR
Title	German:	Negative Transkonduktanz-Schaltung, Filter und geräuscharmer Verstärker mit derartigem Filter	[2008/41]
	English:	A negative gm circuit, a filter and low noise amplifier including such a filter	[2008/41]
	French:	Circuit simulant une transconductance négative, filtre et amplificateur à faible bruit comprenant ledit filtre	[2008/41]
Examination procedure	25.03.2014	Amendment by applicant (claims and/or description)
	25.03.2014	Examination requested [2014/18]
	16.06.2014	Despatch of a communication from the examining division (Time limit: M04)
	16.07.2014	Loss of particular rights, legal effect: designated state(s)
	22.07.2014	Reply to a communication from the examining division
	01.09.2014	Despatch of communication of loss of particular rights: designated state(s) AT, BE, BG, CH, CY, CZ, DK, EE, ES, FI, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MT, NL, NO, PL, PT, RO, SE, SI, SK, TR
	18.04.2016	Despatch of a communication from the examining division (Time limit: M02)
	15.06.2016	Reply to a communication from the examining division
	26.10.2016	Communication of intention to grant the patent
	31.01.2017	Fee for grant paid
	31.01.2017	Fee for publishing/printing paid
	31.01.2017	Receipt of the translation of the claim(s)
Divisional application(s)	The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is 16.06.2014
Opposition(s)	18.12.2017	No opposition filed within time limit [2018/08]
Fees paid	Renewal fee
	29.03.2010	Renewal fee patent year 03
	30.03.2011	Renewal fee patent year 04
	30.03.2012	Renewal fee patent year 05
	27.03.2013	Renewal fee patent year 06
	31.03.2014	Renewal fee patent year 07
	31.03.2015	Renewal fee patent year 08
	16.12.2015	Renewal fee patent year 09
Opt-out from the exclusive Tooltip competence of the Unified Patent Court	See the Register of the Unified Patent Court for opt-out data
	Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:	Search	[X]US3732482 (MAREK A) [X] 1,3,10-12 * abstract * * figure 1 * * column 4, line 24 - column 9, line 56 *;
		[XI]US3986152 (HOWELL EDWARD K) [X] 1,3,12-14 * abstract * * figures 1-2 * * column 1, line 46 - column 6, line 20 * [I] 10,11;
		[X]JPS51123037 (MATSUSHITA ELECTRONICS CORP) [X] 1-5 * abstract * * figures 1,4 *;
		[XI]US4053798 (KOIKE SUSUMU, et al) [X] 1-5 * abstract * * figures 3-14 * * column 3, lines 24-63 * [I] 6-9;
		[X]US4384300 (IIZUKA TETSUYA [JP]) [X] 1 * abstract * * figure 1 *;
		[X]EP0607614 (OKI ELECTRIC IND CO LTD [JP]) [X] 1 * abstract * * figures 14,15,22 *;
		[X]US5422563 (PFLUEGER RANDALL J [US]) [X] 1-3 * abstract * * figures 2A,2B *;
		[XA]EP1469600 (JAPAN SCIENCE & TECH AGENCY [JP]) [X] 1-5 * abstract * * figures 1-14 * * claims 1,4,5 * * paragraphs [0003] - [0006] - [0026] - [0027] - [0051] * [A] 6-14;
		[XA]US2007030103 (LIN YING-YAO [TW], et al) [X] 1 * abstract * * figures 4,6 * * paragraphs [0018] - [0023] * [A] 6-9;
		[X] - TAKAGI H ET AL, "Complementary JFET negative-resistance devices", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, (19751201), vol. 10, no. 6, doi:10.1109/JSSC.1975.1050651, ISSN 0018-9200, pages 509 - 515, XP011421889 [X] 1 * abstract * * figures 1,3 * DOI: http://dx.doi.org/10.1109/JSSC.1975.1050651
	Examination	US5451915
		US2004017273
		- BRUCHER A ET AL, "NEGATIVE RESISTANCE MONOLITHIC CIRCUITS FOR MICROWAVE PLANAR ACTIVE FILTER LOSSES COMPENSATION", PROCEEDINGS OF THE 25TH. EUROPEAN MICROWAVE CONFERENCE 1995. BOLOGNA, SEPT. 4 - 7, 1995; [PROCEEDINGS OF THE EUROPEAN MICROWAVE CONFERENCE], SWANLEY, NEXUS MEDIA, GB, (19950904), vol. CONF. 25, ISBN 978-1-899919-15-4, pages 910 - 915, XP000681834
		- CHUA L O ET AL, "BIPOLAR - JFET - MOSFET NEGATIVE RESISTANCE DEVICES", IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, IEEE INC. NEW YORK, US, (19970204), vol. CAS-32, no. 1, pages 46 - 61, XP002024214
	by applicant	- J. A. MACEDO ET AL., "A 1.9 GHz Silicon Receiver with Monolithic Image Filtering", JSSC, (199803), vol. 33, no. 3, doi:doi:10.1109/4.661203, XP000774520 DOI: http://dx.doi.org/10.1109/4.661203

The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.

Legal notice
Terms of use
24.2.25; 35p