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Extract from the Register of European Patents

EP About this file: EP2109024

EP2109024 - Semiconductor device with temperature compensation circuit [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  14.06.2013
Database last updated on 21.05.2024
Most recent event   Tooltip07.02.2014Lapse of the patent in a contracting state
New state(s): FR
published on 12.03.2014  [2014/11]
Applicant(s)For all designated states
Fujitsu Semiconductor Limited
2-10-23 Shin-Yokohama Kohoku-ku, Yokohama-shi
Kanagawa 222-0033 / JP
[2010/25]
Former [2009/42]For all designated states
Fujitsu Microelectronics Limited
7-1, Nishi-Shinjuku 2-chome Shinjuku-ku
Tokyo 163-0722 / JP
Inventor(s)01 / Nanba, Hiromi
c/o FUJITSU LIMITED
1-1, Kamikodanaka 4-chome
Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
02 / Minobe, Kenichi
c/o FUJITSU LIMITED
1-1, Kamikodanaka 4-chome
Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
 [2012/32]
Former [2009/42]01 / Nanba, Hiromi
c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
02 / Minobe, Kenichi
c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
Representative(s)Keltsch, Ulrike, et al
Haseltine Lake LLP
Lincoln House, 5th Floor
300 High Holborn
London WC1V 7JH / GB
[N/P]
Former [2013/21]Holz, Ulrike, et al
Haseltine Lake LLP
Lincoln House, 5th Floor
300 High Holborn
London WC1V 7JH / GB
Former [2012/32]Holtby, Christopher Lawrence
Haseltine Lake LLP Lincoln House, 5th Floor 300 High Holborn
London WC1V 7JH / GB
Former [2009/42]Holtby, Christopher Lawrence
Haseltine Lake LLP Lincoln House, 5th Floor 300 High Holborn
London WC1V 7JH / GB
Application number, filing date09166132.208.04.2002
[2009/42]
Priority number, dateJP2001031159409.10.2001         Original published format: JP 2001311594
[2009/42]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP2109024
Date:14.10.2009
Language:EN
[2009/42]
Type: B1 Patent specification 
No.:EP2109024
Date:08.08.2012
Language:EN
[2012/32]
Search report(s)(Supplementary) European search report - dispatched on:EP09.09.2009
ClassificationIPC:G05D23/24, G01K7/24, H03J3/04, G06F1/20
[2012/11]
CPC:
H03J3/04 (EP,US); G01K7/24 (EP,US); G05D23/1906 (EP,US);
G05D23/1928 (EP,US); G05D23/24 (EP,US); G06F1/206 (EP,US)
Former IPC [2009/42]G05D23/24, G01K7/24, H03J3/04
Designated contracting statesDE,   FR,   GB [2009/42]
TitleGerman:Halbleiteranordnung mit Temperaturkompensationsschaltung[2009/42]
English:Semiconductor device with temperature compensation circuit[2009/42]
French:Dispositif semiconducteur avec circuit de compensation en temperature[2009/42]
Examination procedure12.04.2010Examination requested  [2010/21]
13.04.2010Amendment by applicant (claims and/or description)
29.10.2010Despatch of a communication from the examining division (Time limit: M06)
09.05.2011Reply to a communication from the examining division
28.02.2012Communication of intention to grant the patent
25.06.2012Fee for grant paid
25.06.2012Fee for publishing/printing paid
Parent application(s)   TooltipEP02252513.3  / EP1302832
EP05013415.4  / EP1580636
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued (EP20020252513) is  12.11.2003
Opposition(s)10.05.2013No opposition filed within time limit [2013/29]
Fees paidRenewal fee
18.11.2009Renewal fee patent year 03
18.11.2009Renewal fee patent year 04
18.11.2009Renewal fee patent year 05
18.11.2009Renewal fee patent year 06
18.11.2009Renewal fee patent year 07
18.11.2009Renewal fee patent year 08
28.04.2010Renewal fee patent year 09
21.04.2011Renewal fee patent year 10
03.02.2012Renewal fee patent year 11
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Lapses during opposition  TooltipGB08.04.2013
FR30.04.2013
[2014/11]
Former [2014/09]GB08.04.2013
Documents cited:Search[X]US4345477  (JOHNSON RUSSELL L) [X] 1 * column 11, line 27 - column 13, line 55; figure 1 *;
 [XY]EP0695933  (SSI TECHNOLOGIES INC [US]) [X] 8-10 * abstract * * page 2, line 38 - page 3, line 2 * * page 3, line 25 - page 5, line 23; figure 1 * [Y] 1-4;
 [Y]EP0868024  (SANYO ELECTRIC CO [JP]) [Y] 1-4 * abstract * * column 3, line 36 - column 6, line 5 ** figures 4-6 *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.