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Extract from the Register of European Patents

EP About this file: EP2366144

EP2366144 - SEQUENTIAL PROCESSOR COMPRISING AN ALU ARRAY [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  05.08.2016
Database last updated on 28.05.2024
Most recent event   Tooltip22.06.2018Lapse of the patent in a contracting state
New state(s): MK		published on 25.07.2018  [2018/30]
Applicant(s)For all designated states
Hyperion Core, Inc.
103 Altura Vista
Los Gatos, CA 95032 / US
[2015/40]
Former [2011/38]For all designated states
Hyperion Core, Inc.
103 Altura Vista
Los Gatos, CA 95032 / US
Inventor(s)01 / VORBACH, Martin
Berliner Strasse 50
67360 Lingenfeld / DE
02 / WEINHARDT, Markus
Roonstrasse 3
49076 Osnabrück / DE
03 / MAY, Frank
An der Tuchbleiche 12
81927 München / DE
 [2015/40]
Former [2011/38]01 / VORBACH, Martin
Berliner Strasse 50
67360 Lingenfeld / DE
02 / WEINHARDT, Markus
Roonstrasse 3
49076 Osnabrück / DE
03 / MAY, Frank
An der Tuckbleiche 12
81927 München / DE
Representative(s)Vossius & Partner Patentanwälte Rechtsanwälte mbB
Siebertstrasse 3
81675 München / DE
[2015/40]
Former [2014/07]Pietruk, Claus Peter, et al
Vossius & Partner
Siebertstrasse 4
81675 München / DE
Former [2011/38]Pietruk, Claus Peter
Patentanwalt Heinrich-Lilienfein-Weg 5
76229 Karlsruhe / DE
Application number, filing date09756414.015.10.2009
[2015/40]
WO2009EP07415
Priority number, dateEP2008001803915.10.2008         Original published format: EP 08018039
EP2008001926604.11.2008         Original published format: EP 08019266
EP2008002016719.11.2008         Original published format: EP 08020167
EP2009000049215.01.2009         Original published format: EP 09000492
EP2009000374416.03.2009         Original published format: EP 09003744
EP2009000885907.07.2009         Original published format: EP 09008859
[2011/38]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report
No.:WO2010043401
Date:22.04.2010
Language:EN
[2010/16]
Type: A2 Application without search report 
No.:EP2366144
Date:21.09.2011
Language:EN
The application published by WIPO in one of the EPO official languages on 22.04.2010 takes the place of the publication of the European patent application.
[2011/38]
Type: B1 Patent specification 
No.:EP2366144
Date:30.09.2015
Language:EN
[2015/40]
Search report(s)International search report - published on:EP24.06.2010
ClassificationIPC:G06F9/38, G06F9/45
[2011/38]
CPC:
G06F9/3836 (EP,US); G06F8/443 (EP,US); G06F9/3001 (EP,US);
G06F9/30065 (EP,US); G06F9/3012 (EP,US); G06F9/30123 (EP,US);
G06F9/30134 (EP,US); G06F9/30189 (EP,US); G06F9/381 (EP,US);
G06F9/38585 (EP,US); G06F9/3867 (EP,US); G06F9/3885 (EP,US);
G06F9/3887 (EP,US); G06F9/3889 (EP,US); G06F9/30043 (US) (-)
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   SE,   SI,   SK,   SM,   TR [2015/40]
Extension statesALNot yet paid
BANot yet paid
RSNot yet paid
TitleGerman:SEQUENTIELLER PROZESSOR MIT EINEM ALU-ARRAY[2011/38]
English:SEQUENTIAL PROCESSOR COMPRISING AN ALU ARRAY[2011/38]
French:PROCESSEUR SÉQUENTIEL COMPORTANT UN BLOC ALU[2011/38]
Entry into regional phase16.05.2011National basic fee paid 
16.05.2011Designation fee(s) paid 
16.05.2011Examination fee paid 
Examination procedure16.05.2011Examination requested  [2011/38]
09.01.2012Amendment by applicant (claims and/or description)
07.03.2012Despatch of a communication from the examining division (Time limit: M06)
10.09.2012Reply to a communication from the examining division
08.04.2015Communication of intention to grant the patent
18.08.2015Fee for grant paid
18.08.2015Fee for publishing/printing paid
18.08.2015Receipt of the translation of the claim(s)
Divisional application(s)EP15187352.8  / EP2996035
The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is  07.03.2012
Opposition(s)01.07.2016No opposition filed within time limit [2016/36]
Fees paidRenewal fee
19.10.2011Renewal fee patent year 03
30.10.2012Renewal fee patent year 04
30.10.2013Renewal fee patent year 05
31.10.2014Renewal fee patent year 06
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court		 See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipHU15.10.2009
AT30.09.2015
BE30.09.2015
BG30.09.2015
CY30.09.2015
CZ30.09.2015
DK30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
MC30.09.2015
MK30.09.2015
MT30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SI30.09.2015
SK30.09.2015
SM30.09.2015
TR30.09.2015
IE15.10.2015
LU15.10.2015
CH31.10.2015
LI31.10.2015
FR30.11.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
[2018/30]
Former [2018/02]HU15.10.2009
AT30.09.2015
BE30.09.2015
BG30.09.2015
CY30.09.2015
CZ30.09.2015
DK30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
MC30.09.2015
MT30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SI30.09.2015
SK30.09.2015
SM30.09.2015
TR30.09.2015
IE15.10.2015
LU15.10.2015
CH31.10.2015
LI31.10.2015
FR30.11.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
Former [2017/38]HU15.10.2009
AT30.09.2015
BE30.09.2015
BG30.09.2015
CY30.09.2015
CZ30.09.2015
DK30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
MC30.09.2015
MT30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SI30.09.2015
SK30.09.2015
SM30.09.2015
TR30.09.2015
IE15.10.2015
CH31.10.2015
LI31.10.2015
FR30.11.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
Former [2017/03]AT30.09.2015
BE30.09.2015
CZ30.09.2015
DK30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
MC30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SI30.09.2015
SK30.09.2015
IE15.10.2015
CH31.10.2015
LI31.10.2015
FR30.11.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
Former [2016/50]AT30.09.2015
CZ30.09.2015
DK30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
MC30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SI30.09.2015
SK30.09.2015
IE15.10.2015
CH31.10.2015
LI31.10.2015
FR30.11.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
Former [2016/49]AT30.09.2015
CZ30.09.2015
DK30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
MC30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SI30.09.2015
SK30.09.2015
IE15.10.2015
CH31.10.2015
LI31.10.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
Former [2016/45]AT30.09.2015
CZ30.09.2015
DK30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
MC30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SK30.09.2015
IE15.10.2015
CH31.10.2015
LI31.10.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
Former [2016/39]AT30.09.2015
CZ30.09.2015
DK30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
MC30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SK30.09.2015
CH31.10.2015
LI31.10.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
Former [2016/34]AT30.09.2015
CZ30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
MC30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SK30.09.2015
CH31.10.2015
LI31.10.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
Former [2016/28]AT30.09.2015
CZ30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
MC30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SK30.09.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
Former [2016/24]AT30.09.2015
CZ30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
NL30.09.2015
PL30.09.2015
RO30.09.2015
SE30.09.2015
SK30.09.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
PT01.02.2016
Former [2016/23]CZ30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
NL30.09.2015
RO30.09.2015
SE30.09.2015
SK30.09.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
Former [2016/22]CZ30.09.2015
EE30.09.2015
ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
NL30.09.2015
SE30.09.2015
NO30.12.2015
GR31.12.2015
IS30.01.2016
Former [2016/21]ES30.09.2015
FI30.09.2015
HR30.09.2015
IT30.09.2015
LT30.09.2015
LV30.09.2015
SE30.09.2015
NO30.12.2015
GR31.12.2015
Former [2016/20]ES30.09.2015
FI30.09.2015
HR30.09.2015
LT30.09.2015
LV30.09.2015
SE30.09.2015
NO30.12.2015
GR31.12.2015
Former [2016/10]FI30.09.2015
HR30.09.2015
LT30.09.2015
LV30.09.2015
SE30.09.2015
NO30.12.2015
GR31.12.2015
Former [2016/09]FI30.09.2015
LT30.09.2015
LV30.09.2015
NO30.12.2015
GR31.12.2015
Former [2016/08]LT30.09.2015
NO30.12.2015
Former [2016/07]LT30.09.2015
Cited inInternational search[A]  - FRANK BOUWENS ET AL, Architectural Exploration of the ADRES Coarse-Grained Reconfigurable Array, RECONFIGURABLE COMPUTING: ARCHITECTURES, TOOLS AND APPLICATIONS; [LECTURE NOTES IN COMPUTER SCIENCE;;LNCS], SPRINGER BERLIN HEIDELBERG, BERLIN, HEIDELBERG, PAGE(S) 1 - 13, (20070327), ISBN 9783540714309, XP019078137 [A] 1 * page 2, paragraph l; figure 1 * * page 3, lines 1-2; figure 2 * * page 4, paragraph l * * page 6, paragraph 2; figure 4 *
 [X]  - K. SANKARALINGAM, R. NAGARAJAN, H. LIU, C. KIM, J. HUH, N. RANGANATHAN, D.C. BURGER, S.W. KECKLER, R.G. MCDONALD, AND C.R. MOORE, "TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP", ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, vol. 1, (200403), pages 62 - 93, URL: http://www.ittc.ku.edu/~rsass/rcreading/sankaralingam04.pdf, (20100115), XP002563402 [X] 1 * page 66, paragraph 3 * * page 68, 1st sentence of section 2.2 * * page 68, line l; figure 3 * * page 69, paragraphs 1-2 * * page 83, paragraph 2 * * page 84, paragraph 2 *
 [A]  - ZION KWOK ET AL, "Register File Architecture Optimization in a Coarse-Grained Reconfigurable Architecture", FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, 2005. FCCM 2005. 13TH AN NUAL IEEE SYMPOSIUM ON NAPA, CA, USA 18-20 APRIL 2005, PISCATAWAY, NJ, USA,IEEE, (20050418), ISBN 978-0-7695-2445-0, pages 35 - 44, XP010841255 [A] 1 * page 2, column l, paragraph l; figure 2 *

DOI:   http://dx.doi.org/10.1109/FCCM.2005.58
 [A]  - BECKER J ET AL, "Scalable Processor Instruction Set Extension", IEEE DESIGN & TEST OF COMPUTERS, IEEE SERVICE CENTER, NEW YORK, NY, US, (20050201), vol. 22, no. 2, ISSN 0740-7475, pages 136 - 148, XP011129189 [A] 1 * page 136, column r, paragraph l * * pages 140-144, section "LEON-XPP datapath extension" *

DOI:   http://dx.doi.org/10.1109/MDT.2005.43
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