EP2237281 - Semiconductor memory device, and method of controlling the same [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 23.05.2014 Database last updated on 12.07.2024 | Most recent event Tooltip | 23.05.2014 | No opposition filed within time limit | published on 25.06.2014 [2014/26] | Applicant(s) | For all designated states Fujitsu Semiconductor Limited 2-10-23 Shin-Yokohama Kohoku-ku, Yokohama-shi Kanagawa 222-0033 / JP | [2010/40] | Inventor(s) | 01 /
Fujioka, Shinya c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | 02 /
Kawakubo, Tomohiro c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | 03 /
Nishimura, Koichi c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | 04 /
Sato, Kotoku c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | [2013/42] |
Former [2012/49] | 01 /
Fujijoka, Shinya c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | ||
02 /
Kawakubo, Tomohiro c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | |||
03 /
Nishimura, Koichi c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | |||
04 /
Sato, Kotoku c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | |||
Former [2010/40] | 01 /
Fujijoka, Shinya c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Naka Kawasaki-shi Kanagawa 211-8588 / JP | ||
02 /
Kawakubo, Tomohiro c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Naka Kawasaki-shi Kanagawa 211-8588 / JP | |||
03 /
Nishimura, Koichi c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Naka Kawasaki-shi Kanagawa 211-8588 / JP | |||
04 /
Sato, Kotoku c/o FUJITSU LIMITED 1-1, Kamikodanaka 4-chome Naka Kawasaki-shi Kanagawa 211-8588 / JP | Representative(s) | Fenlon, Christine Lesley Haseltine Lake LLP Lincoln House, 5th Floor 300 High Holborn London WC1V 7JH / GB | [2013/29] |
Former [2010/40] | Fenlon, Christine Lesley Haseltine Lake LLP Lincoln House, 5th Floor 300 High Holborn London WC1V 7JH / GB | Application number, filing date | 10165898.7 | 27.09.2000 | [2010/40] | Priority number, date | JP19990318458 | 09.11.1999 Original published format: JP 31845899 | JP20000241019 | 09.08.2000 Original published format: JP 2000241019 | [2010/40] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP2237281 | Date: | 06.10.2010 | Language: | EN | [2010/40] | Type: | B1 Patent specification | No.: | EP2237281 | Date: | 17.07.2013 | Language: | EN | [2013/29] | Type: | B8 Corrected title page of specification | No.: | EP2237281 | Date: | 23.10.2013 | [2013/43] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 01.09.2010 | Classification | IPC: | G11C11/406, G11C5/14, G11C14/00 | [2012/44] | CPC: |
G11C5/14 (EP,KR);
G11C11/406 (EP);
G11C5/147 (EP);
G11C2207/2227 (EP)
|
Former IPC [2010/40] | G11C11/406, G11C5/14 | Designated contracting states | DE, FR, GB [2010/40] | Title | German: | Halbleiterspeichervorrichtung und Steuerverfahren dafür | [2010/40] | English: | Semiconductor memory device, and method of controlling the same | [2010/40] | French: | Dispositif mémoire à semi-conducteur et son procédé de commande | [2010/40] | Examination procedure | 30.03.2011 | Examination requested [2011/19] | 06.04.2011 | Amendment by applicant (claims and/or description) | 15.11.2012 | Communication of intention to grant the patent | 24.01.2013 | Disapproval of the communication of intention to grant the patent by the applicant or resumption of examination proceedings by the EPO | 06.02.2013 | Communication of intention to grant the patent | 31.05.2013 | Fee for grant paid | 31.05.2013 | Fee for publishing/printing paid | Parent application(s) Tooltip | EP00308482.9 / EP1100089 | EP09156495.5 / EP2083424 | Divisional application(s) | The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued (EP20000308482) is 10.10.2006 | Opposition(s) | 22.04.2014 | No opposition filed within time limit [2014/26] | Fees paid | Renewal fee | 06.10.2010 | Renewal fee patent year 03 | 06.10.2010 | Renewal fee patent year 04 | 06.10.2010 | Renewal fee patent year 05 | 06.10.2010 | Renewal fee patent year 06 | 06.10.2010 | Renewal fee patent year 07 | 06.10.2010 | Renewal fee patent year 08 | 06.10.2010 | Renewal fee patent year 09 | 06.10.2010 | Renewal fee patent year 10 | 29.09.2010 | Renewal fee patent year 11 | 29.09.2011 | Renewal fee patent year 12 | 04.07.2012 | Renewal fee patent year 13 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0566306 (HITACHI LTD [JP]) [A] 1 * column 3, line 9 - column 6, line 48 * * column 21, line 27 - line 42; figures 1, 20 * |