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Extract from the Register of European Patents

EP About this file: EP2339454

EP2339454 - Method and apparatus for resolving instruction starvation in a multithreaded processor [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  22.08.2014
Database last updated on 24.08.2024
Most recent event   Tooltip15.07.2016Lapse of the patent in a contracting state
New state(s): TR		published on 17.08.2016  [2016/33]
Applicant(s)For all designated states
Intel Corporation
2200 Mission College Boulevard
Santa Clara, CA 95054 / US
[N/P]
Former [2011/26]For all designated states
Intel Corporation
2200 Mission College Boulevard
Santa Clara, CA 95052 / US
Inventor(s)01 / Boggs, Darrell
2200 S.W. 195th Avenue
Aloha, OR 97006 / US
02 / Kyker, Alan
810 Suffolk Place
Winters, CA 95694 / US
03 / Upton, Michael
1410 NW 24th Avenue
Portland, OR 97210 / US
04 / Allen, James
4201 Monterey Oaks Blvd
Apt 107
Austin, TX 78749 / US
05 / Burns, David
10080 NW Priscilla Court
Portland, OR 97229 / US
 [2013/42]
Former [2011/26]01 / Boggs, Darrell
2200 S.W. 195th Avenue
Aloha, OR 97006 / US
02 / Kyker, Alan
810 Suffolk Place
Winters, CA 95694 / US
03 / Upton, Michael
1410 NW 24th Avenue
Portland, OR 97210 / US
04 / Allen, James
4201 Monterey Oaks Blvd Apt 107
Austin, TX 78749 / US
05 / Burns, David
10080 NW Priscilla Court
Portland, OR 97229 / US
Representative(s)Walker, Ross Thomson
Forresters IP LLP
Skygarden
Erika-Mann-Strasse 11
80636 München / DE
[N/P]
Former [2013/42]Walker, Ross Thomson
Forresters
Skygarden
Erika-Mann-Strasse 11
80636 München / DE
Former [2011/26]Walker, Ross Thomson
Potts, Kerr & Co. 15 Hamilton Square Birkenhead
Merseyside CH41 6BR / GB
Application number, filing date10196212.418.04.2002
[2011/26]
Priority number, dateUS2001088827422.06.2001         Original published format: US 888274
[2011/26]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP2339454
Date:29.06.2011
Language:EN
[2011/26]
Type: A3 Search report 
No.:EP2339454
Date:20.07.2011
[2011/29]
Type: B1 Patent specification 
No.:EP2339454
Date:16.10.2013
Language:EN
[2013/42]
Search report(s)(Supplementary) European search report - dispatched on:EP22.06.2011
ClassificationIPC:G06F9/38, G06F9/48
[2013/15]
CPC:
G06F9/4881 (EP,US); G06F9/3851 (EP,US)
Former IPC [2011/26]G06F9/38, G06F9/46
Designated contracting statesAT,   BE,   CH,   CY,   DE,   DK,   ES,   FI,   FR,   GB,   GR,   IE,   IT,   LI,   LU,   MC,   NL,   PT,   SE,   TR [2011/26]
TitleGerman:Verfahren und Vorrichtung zur Auflösung von Befehlsunterbrechung in einem Vielfadenprozessor[2011/26]
English:Method and apparatus for resolving instruction starvation in a multithreaded processor[2011/26]
French:Procédé et dispositif destinés à resoudre une insuffisance de ressources d'instructions dans un processeur multifilière[2011/29]
Former [2011/26]Procédé et dispositif destinés à resoudre une insuffisance de ressources d'instructions dans un processeur multifiliere
Examination procedure19.01.2012Amendment by applicant (claims and/or description)
19.01.2012Examination requested  [2012/09]
21.02.2012Despatch of a communication from the examining division (Time limit: M04)
26.06.2012Reply to a communication from the examining division
10.05.2013Communication of intention to grant the patent
03.09.2013Fee for grant paid
03.09.2013Fee for publishing/printing paid
Parent application(s)   TooltipEP02723907.8  / EP1399810
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued (EP20020723907) is  04.03.2010
Opposition(s)17.07.2014No opposition filed within time limit [2014/39]
Fees paidRenewal fee
21.12.2010Renewal fee patent year 03
21.12.2010Renewal fee patent year 04
21.12.2010Renewal fee patent year 05
21.12.2010Renewal fee patent year 06
21.12.2010Renewal fee patent year 07
21.12.2010Renewal fee patent year 08
21.12.2010Renewal fee patent year 09
17.03.2011Renewal fee patent year 10
28.03.2012Renewal fee patent year 11
12.04.2013Renewal fee patent year 12
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court		 See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipAT16.10.2013
BE16.10.2013
CY16.10.2013
DK16.10.2013
ES16.10.2013
FI16.10.2013
IT16.10.2013
MC16.10.2013
NL16.10.2013
SE16.10.2013
TR16.10.2013
GR17.01.2014
PT17.02.2014
IE18.04.2014
LU18.04.2014
CH30.04.2014
FR30.04.2014
LI30.04.2014
[2016/33]
Former [2016/28]AT16.10.2013
BE16.10.2013
CY16.10.2013
DK16.10.2013
ES16.10.2013
FI16.10.2013
IT16.10.2013
MC16.10.2013
NL16.10.2013
SE16.10.2013
GR17.01.2014
PT17.02.2014
IE18.04.2014
LU18.04.2014
CH30.04.2014
FR30.04.2014
LI30.04.2014
Former [2015/21]AT16.10.2013
BE16.10.2013
CY16.10.2013
DK16.10.2013
ES16.10.2013
FI16.10.2013
IT16.10.2013
MC16.10.2013
NL16.10.2013
SE16.10.2013
PT17.02.2014
IE18.04.2014
LU18.04.2014
CH30.04.2014
FR30.04.2014
LI30.04.2014
Former [2015/14]AT16.10.2013
BE16.10.2013
CY16.10.2013
DK16.10.2013
ES16.10.2013
FI16.10.2013
IT16.10.2013
MC16.10.2013
NL16.10.2013
SE16.10.2013
PT17.02.2014
LU18.04.2014
CH30.04.2014
FR30.04.2014
LI30.04.2014
Former [2015/08]AT16.10.2013
BE16.10.2013
CY16.10.2013
DK16.10.2013
ES16.10.2013
FI16.10.2013
IT16.10.2013
MC16.10.2013
NL16.10.2013
SE16.10.2013
PT17.02.2014
LU18.04.2014
CH30.04.2014
LI30.04.2014
Former [2015/01]AT16.10.2013
BE16.10.2013
CY16.10.2013
DK16.10.2013
ES16.10.2013
FI16.10.2013
IT16.10.2013
MC16.10.2013
NL16.10.2013
SE16.10.2013
PT17.02.2014
LU18.04.2014
Former [2014/52]AT16.10.2013
BE16.10.2013
CY16.10.2013
DK16.10.2013
ES16.10.2013
FI16.10.2013
IT16.10.2013
MC16.10.2013
NL16.10.2013
SE16.10.2013
PT17.02.2014
Former [2014/41]AT16.10.2013
BE16.10.2013
CY16.10.2013
DK16.10.2013
ES16.10.2013
FI16.10.2013
IT16.10.2013
NL16.10.2013
SE16.10.2013
PT17.02.2014
Former [2014/38]AT16.10.2013
BE16.10.2013
CY16.10.2013
ES16.10.2013
FI16.10.2013
IT16.10.2013
NL16.10.2013
SE16.10.2013
PT17.02.2014
Former [2014/28]AT16.10.2013
BE16.10.2013
CY16.10.2013
ES16.10.2013
FI16.10.2013
NL16.10.2013
SE16.10.2013
PT17.02.2014
Former [2014/26]AT16.10.2013
BE16.10.2013
CY16.10.2013
ES16.10.2013
FI16.10.2013
NL16.10.2013
SE16.10.2013
Former [2014/24]AT16.10.2013
BE16.10.2013
ES16.10.2013
FI16.10.2013
NL16.10.2013
SE16.10.2013
Former [2014/23]BE16.10.2013
FI16.10.2013
NL16.10.2013
SE16.10.2013
Former [2014/22]FI16.10.2013
NL16.10.2013
SE16.10.2013
Documents cited:Search[I]US6052708  (FLYNN WILLIAM THOMAS [US], et al) [I] 1-13 * column 1, lines 60-62 * * column 3, line 40 * * column 4, lines 17-60 * * column 5, line 20 * * column 6, lines 26-42 * * column 7, line 38 * * column 9, line 11 *;
 [I]US6073159  (EMER JOEL S [US], et al) [I] 1-13 * column 3, lines 35-40 * * column 4, lines 57-60 * * column 6, line 65 * * column 8, line 24 * * column 10, lines 57-60 * * column 11, line 38 *;
 [A]  - EGGERS S J ET AL, "SIMULTANEOUS MULTITHREADING: A PLATFORM FOR NEXT-GENERATION PROCESSORS", IEEE MICRO, IEEE SERVICE CENTER, LOS ALAMITOS, CA, US, (19970901), vol. 17, no. 5, doi:10.1109/40.621209, ISSN 0272-1732, pages 12 - 19, XP000702012 [A] 1-13 * page 4, column 2 *

DOI:   http://dx.doi.org/10.1109/40.621209
 [I]  - PAREKH S ET AL, "Thread-Sensitive Scheduling for SMT Processors", TECHNICAL REPORT DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERINGUNIVERSITY OF WASHINGTON, XX, XX, (20000101), pages 1 - 18, XP003013088 [I] 1,9,13 * page 11 * * page 15 *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.