blank Quick help
blank Maintenance news

Scheduled maintenance

Regular maintenance outages:
between 05.00 and 05.15 hrs CET (Monday to Sunday).

Other outages
Availability
Register Forum

2022.02.11

More...
blank News flashes

News Flashes

New version of the European Patent Register – SPC proceedings information in the Unitary Patent Register.

2024-07-24

More...
blank Related links

Extract from the Register of European Patents

EP About this file: EP2482308

EP2482308 - Semiconductor device and manufacturing method thereof [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  24.05.2019
Database last updated on 09.09.2024
FormerExamination is in progress
Status updated on  18.01.2019
Most recent event   Tooltip24.05.2019Withdrawal of applicationpublished on 26.06.2019  [2019/26]
Applicant(s)For all designated states
Renesas Electronics Corporation
2-24, Toyosu 3-chome
Koutou-ku
Tokyo 135-0061 / JP
[2015/45]
Former [2012/31]For all designated states
Renesas Electronics Corporation
1753 Shimonumabe, Nakahara-ku
Kawasaki-shi, Kanagawa / JP
Inventor(s)01 / Machida, Nobuo
c/o Renesas Electronics Corporation
1753, Shimonumabe
Nakahara-ku
Kawasaki-shi
Kanagawa, 211-8668 / JP
02 / Arai, Koichi
c/o Renesas Electronics Corporation
1753, Shimonumabe
Nakahara-ku
Kawasaki-shi
Kanagawa, 211-8668 / JP
 [2012/31]
Representative(s)Betten & Resch
Patent- und Rechtsanwälte PartGmbB
Maximiliansplatz 14
80333 München / DE
[N/P]
Former [2012/31]Calderbank, Thomas Roger, et al
Mewburn Ellis LLP 33 Gutter Lane
London EC2V 8AS / GB
Application number, filing date12150166.204.01.2012
[2012/31]
Priority number, dateJP2011001759531.01.2011         Original published format: JP 2011017595
[2012/31]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP2482308
Date:01.08.2012
Language:EN
[2012/31]
Type: A3 Search report 
No.:EP2482308
Date:07.01.2015
Language:EN
[2015/02]
Search report(s)(Supplementary) European search report - dispatched on:EP05.12.2014
ClassificationIPC:H01L21/336, H01L29/78, H01L29/16
[2012/31]
CPC:
H01L29/7802 (EP,KR,US); H01L29/66068 (EP,KR,US); H01L29/045 (EP,KR,US);
H01L29/0657 (EP,KR,US); H01L29/0696 (EP,KR,US); H01L29/1608 (EP,KR,US)
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2015/27]
Former [2012/31]AL,  AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HR,  HU,  IE,  IS,  IT,  LI,  LT,  LU,  LV,  MC,  MK,  MT,  NL,  NO,  PL,  PT,  RO,  RS,  SE,  SI,  SK,  SM,  TR 
Extension statesBANot yet paid
MENot yet paid
TitleGerman:Halbleiterbauelement und Herstellungsverfahren dafür[2012/31]
English:Semiconductor device and manufacturing method thereof[2012/31]
French:Dispositif de semi-conducteurs et son procédé de fabrication[2012/31]
Examination procedure21.05.2015Amendment by applicant (claims and/or description)
21.05.2015Examination requested  [2015/27]
22.01.2019Despatch of a communication from the examining division (Time limit: M04)
21.05.2019Application withdrawn by applicant  [2019/26]
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is  22.01.2019
Fees paidRenewal fee
24.01.2014Renewal fee patent year 03
26.01.2015Renewal fee patent year 04
25.01.2016Renewal fee patent year 05
23.01.2017Renewal fee patent year 06
25.01.2018Renewal fee patent year 07
16.01.2019Renewal fee patent year 08
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court
See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[XYI]US5814859  (GHEZZO MARIO [US], et al) [X] 1-4,12-14,16-20 * column 3, line 1 - column 7, line 25; figures 1-18 * [Y] 15 [I] 11;
 [XI]EP1742271  (ST MICROELECTRONICS SRL [IT]) [X] 1-4,12,13,16-20 * paragraph [0003] - paragraph [0020]; figure 1 * * paragraph [0069] - paragraph [0097]; figures 15-21 * [I] 11;
 [XI]EP1742249  (ST MICROELECTRONICS SRL [IT]) [X] 1-4,12,13,16-20 * paragraph [0038] - paragraph [0074]; figures 5-14 * [I] 11;
 [A]WO9900833  (HARRIS CORP [US]) [A] 1-20 * the whole document *;
 [A]JP2009049363  (MITSUBISHI ELECTRIC CORP) [A] 5,10 * abstract * * paragraph [0022]; figures 1-8 *
 [Y]  - LICHTENWALNER DANIEL ET AL, "High-mobility enhancement-mode 4H-SiC lateral field-effect transistors utilizing atomic layer deposited Al2O3 gate dielectric", APPLIED PHYSICS LETTERS, AMERICAN INSTITUTE OF PHYSICS, US, (20091016), vol. 95, no. 15, doi:10.1063/1.3251076, ISSN 0003-6951, pages 152113 - 152113, XP012126068 [Y] 15 * the whole document *

DOI:   http://dx.doi.org/10.1063/1.3251076
by applicantJP2011017595
 JP2008108869
 JP2008147576
 US2010035420
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.