EP2482321 - Method of fabricating a deep trench insulated gate bipolar transistor [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 15.08.2014 Database last updated on 05.10.2024 | Most recent event Tooltip | 15.08.2014 | Application deemed to be withdrawn | published on 17.09.2014 [2014/38] | Applicant(s) | For all designated states Power Integrations, Inc. 5245 Hellyer Avenue San Jose, California 95138 / US | [2012/31] | Inventor(s) | 01 /
Parthasarathy, Vijay 1055 Bonita Avenue Mountain View, CA 94040 / US | 02 /
Banerjee, Sujit 1901 Huxley Court San Jose, CA 95125 / US | [2012/31] | Representative(s) | Peterreins, Frank Fish & Richardson P.C. Highlight Business Towers Mies-van-der-Rohe-Strasse 8 80807 München / DE | [N/P] |
Former [2012/31] | Peterreins, Frank Fish & Richardson P.C. Highlight Towers Mies-van-der-Rohe-Straße 8 80807 München / DE | Application number, filing date | 12164827.3 | 18.12.2009 | [2012/31] | Priority number, date | US20080317297 | 20.12.2008 Original published format: US 317297 | [2012/31] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP2482321 | Date: | 01.08.2012 | Language: | EN | [2012/31] | Type: | A3 Search report | No.: | EP2482321 | Date: | 04.12.2013 | Language: | EN | [2013/49] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 06.11.2013 | Classification | IPC: | H01L29/739, H01L21/331 | [2013/49] | CPC: |
H01L29/7397 (EP,US);
H01L29/66333 (EP,US)
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Former IPC [2012/31] | H01L29/739, H01L21/331, H01L29/66 | Designated contracting states | AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR [2012/31] | Title | German: | Verfahren zur Herstellung eines bipolaren Transistors mit tiefgrabenisoliertem Gate | [2012/31] | English: | Method of fabricating a deep trench insulated gate bipolar transistor | [2012/31] | French: | Procédé de fabrication de transistor bipolaire à porte à isolation en tranches profondes | [2012/31] | Examination procedure | 19.04.2012 | Examination requested [2012/31] | 25.11.2013 | Despatch of a communication from the examining division (Time limit: M04) | 08.04.2014 | Application deemed to be withdrawn, date of legal effect [2014/38] | 07.05.2014 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time [2014/38] | Parent application(s) Tooltip | EP09179794.4 / EP2200088 | Divisional application(s) | The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued (EP20090179794) is 23.04.2010 | Fees paid | Renewal fee | 19.04.2012 | Renewal fee patent year 03 | 26.12.2012 | Renewal fee patent year 04 | 27.12.2013 | Renewal fee patent year 05 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [IY]EP0494597 (TOSHIBA KK [JP]) [I] 1-8,11-15 * column 4, lines 33-55; figure 6 * * column 2, line 42 - column 3, line 41 * [Y] 9,10; | [Y]EP1909331 (POWER INTEGRATIONS INC [US]) [Y] 9,10 * figures 1D-1G *; | [A]US2005263852 (OGURA TSUNEO [JP], et al) [A] 1-15 * the whole document *; | [A]US2003136974 (YEDINAK JOSEPH A [US], et al) [A] 1-15 * the whole document *; | [A]US2003209781 (HATTORI HIDETAKA [JP]) [A] 1-15 * the whole document *; | [A]US6362505 (TIHANYI JENOE [DE]) [A] 1 * figure 1 *; | [A]EP1959499 (POWER INTEGRATIONS INC [US]) [A] 1 * figure 1 *; | [A]JP2008153389 (TOYOTA MOTOR CORP) [A] 1 * paragraphs [0004] , [0011] , [0031]; figure 14 *; | [A] - YAMADA J ET AL, "Low turn-off switching energy 1200 V IGBT module", CONFERENCE RECORD OF THE 2002 IEEE INDUSTRY APPLICATIONS CONFERENCE : 37TH IAS ANNUAL MEETING ; 13 - 18 OCTOBER 2002, PITTSBURGH, PENNSYLVANIA, USA; [CONFERENCE RECORD OF THE IEEE INDUSTRY APPLICATIONS CONFERENCE. IAS ANNUAL MEETING], IEEE SERVICE CE, (20021013), doi:10.1109/IAS.2002.1043831, ISBN 978-0-7803-7420-1, page 2165, XP032143387 [A] 1 * Section III;; figures 3a,3b,4 * DOI: http://dx.doi.org/10.1109/IAS.2002.1043831 |