Extract from the Register of European Patents

EP About this file: EP2615642

EP2615642 - Trench-gate MISFET [Right-click to bookmark this link]
StatusThe application has been refused
Status updated on  09.08.2019
Database last updated on 11.04.2026
Most recent event   Tooltip09.08.2019Refusal of applicationpublished on 11.09.2019  [2019/37]
Applicant(s)For all designated states
Cree, Inc.
4600 Silicon Drive
Durham, NC 27703 / US
[N/P]
Former [2013/29]For all designated states
Cree, Inc.
4600 Silicon Drive
Durham, NC 27703 / US
Inventor(s)01 / Zhang, Qingchun
108 Hickorywood Boulevard
Cary, NC 27519 / US
02 / Agarwal, Anant
208 Black Tie Lane
Chapel Hill, NC 27514 / US
03 / Jonas, Charlotte
209 Berlin Way
Morrisville, NC 27560 / US
 [2013/29]
Representative(s)FRKelly
Waterways House
Grand Canal Quay
Dublin D02 PD39 / IE
[N/P]
Former [2013/38]Brophy, David Timothy, et al
FRKelly 27 Clyde Road Ballsbridge
Dublin 4 / IE
Former [2013/29]Boyce, Conor
FRKelly
27 Clyde Road
Ballsbridge
Dublin 4 / IE
Application number, filing date13161683.105.12.2008
[2013/29]
Priority number, dateUS2007095244707.12.2007         Original published format: US 952447
[2013/29]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP2615642
Date:17.07.2013
Language:EN
[2013/29]
Search report(s)(Supplementary) European search report - dispatched on:EP13.06.2013
ClassificationIPC:H01L29/04, H01L29/06, H01L29/08, H01L29/10, H01L29/78, H01L29/739, H01L29/749, // H01L29/24
[2013/29]
CPC:
H10D30/668 (EP,US); H10D18/40 (EP,US); H10D30/635 (EP,US);
H10D62/105 (EP,US); H10D62/151 (EP,US); H10D62/157 (EP,US);
H10D62/393 (EP,US); H10D62/405 (EP,US); H10D62/8325 (EP,US) (-)
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MT,   NL,   NO,   PL,   PT,   RO,   SE,   SI,   SK,   TR [2013/29]
TitleGerman:Transistor mit A-Seiten-Leitkanal und Grabenschutzbohrbereich[2013/29]
English:Trench-gate MISFET[2013/29]
French:Transistor avec canal conducteur de face A et région de puits de protection de tranchée[2013/29]
Examination procedure17.01.2014Amendment by applicant (claims and/or description)
17.01.2014Examination requested  [2014/10]
21.02.2014Despatch of a communication from the examining division (Time limit: M04)
17.06.2014Reply to a communication from the examining division
30.06.2016Date of oral proceedings
11.07.2016Minutes of oral proceedings despatched
14.07.2016Despatch of communication that the application is refused, reason: substantive examination [2019/37]
09.07.2019Application refused, date of legal effect [2019/37]
Appeal following examination08.09.2016Appeal received No.  T2679/16
23.11.2016Statement of grounds filed
09.07.2019Result of appeal procedure: appeal of the applicant was rejected
09.07.2019Date of oral proceedings
16.07.2019Minutes of oral proceedings despatched
Parent application(s)   TooltipEP08170802.6  / EP2068363
Fees paidRenewal fee
29.07.2013Renewal fee patent year 03
29.07.2013Renewal fee patent year 04
29.07.2013Renewal fee patent year 05
12.12.2013Renewal fee patent year 06
11.12.2014Renewal fee patent year 07
10.12.2015Renewal fee patent year 08
13.12.2016Renewal fee patent year 09
12.12.2017Renewal fee patent year 10
12.12.2018Renewal fee patent year 11
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Documents cited:Search[XI] US6057558  (YAMAMOTO TSUYOSHI et al.)
 [XI] JP2001267570  (MITSUBISHI ELECTRIC CORP et al.)
 [L] EP2068363  (CREE INC et al.)
 [AD]   YANO; KIMOTO; MATSUNAMI; ASANO; SUGAWARA: "High Channel Mobility in Inversion Layers of 4H-SiC MOSFETs by Utilizing (1120) Face", IEEE ELECTRON DEVICE LETTERS, vol. 20, no. 12, December 1999 (1999-12-01), pages 611 - 613, XP002698013

DOI:   http://dx.doi.org/10.1109/55.806101
 [XI]   YANO H ET AL: "HIGH CHANNEL MOBILITY IN INVERSION LAYER OF SIC MOSFETS FOR POWER SWITCHING TRANSISTORS", EXTENDED ABSTRACTS OF THE INTERNATIONAL CONFERENCE ON SOLIDSTATE DEVICES AND MATERIALS, JAPAN SOCIETY OF APPLIED PHYSICS. TOKYO, JA, 1 January 1999 (1999-01-01), pages 372/373, XP000935127 [I] 14-17
by applicantUS5976936
 US2002185679
   ZETTERLING, CARL-MIKAEL: "Process Technology for Silicon Carbide Devices", 2002, INSTITUTE OF ELECTRICAL ENGINEERS, pages: 3
   YANO; KIMOTO; MATSUNAMI; ASANO; SUGAWARA: "High Channel Mobility in Inversion Layers of 4H-SiC MOSFETs by Utilizing (1120) Face", IEEE ELECTRON DEVICE LETTERS, vol. 20, no. 12, December 1999 (1999-12-01), pages 611 - 613, XP011424323, DOI: doi:10.1109/55.806101

DOI:   http://dx.doi.org/10.1109/55.806101
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