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Extract from the Register of European Patents

EP About this file: EP2849232

EP2849232 - Semiconductor device and method for manufacturing the same [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  24.06.2016
Database last updated on 11.09.2024
Most recent event   Tooltip24.06.2016Withdrawal of applicationpublished on 27.07.2016  [2016/30]
Applicant(s)For all designated states
Kabushiki Kaisha Toshiba
1-1, Shibaura 1-Chome Minato-Ku
Tokyo 105-8001 / JP
[2015/12]
Inventor(s)01 / Ota, Chiharu
c/o IP Div. Toshiba Corp. (K. K. TOSHIBA)
1-1, Shibaura 1-chome
Minato-ku, Tokyo / JP
02 / Takao, Kazuto
c/o IP Div. Toshiba Corp. (K. K. TOSHIBA)
1-1, Shibaura 1-chome
Minato-ku, Tokyo / JP
03 / Nishio, Johji
c/o IP Div. Toshiba Corp. (K. K. TOSHIBA)
1-1, Shibaura 1-chome
Minato-ku, Tokyo / JP
04 / Shinohe, Takashi
c/o IP Div. Toshiba Corp. (K. K. TOSHIBA)
1-1, Shibaura 1-chome
Minato-ku, Tokyo / JP
 [2015/12]
Representative(s)Moreland, David, et al
Marks & Clerk LLP The Beacon
176 St Vincent Street
Glasgow G2 5SG / GB
[N/P]
Former [2015/12]Granleese, Rhian Jane
Marks & Clerk LLP
90 Long Acre
London WC2E 9RA / GB
Application number, filing date14181168.715.08.2014
[2015/12]
Priority number, dateJP2013018979512.09.2013         Original published format: JP 2013189795
[2015/12]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP2849232
Date:18.03.2015
Language:EN
[2015/12]
Type: A3 Search report 
No.:EP2849232
Date:06.05.2015
Language:EN
[2015/19]
Search report(s)(Supplementary) European search report - dispatched on:EP10.04.2015
ClassificationIPC:H01L29/861, H01L29/16
[2015/12]
CPC:
H01L29/1608 (EP,US); H01L21/02529 (US); H01L21/02664 (US);
H01L29/36 (US); H01L29/861 (EP,US)
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2015/12]
Extension statesBANot yet paid
MENot yet paid
TitleGerman:Halbleiterbauelement und Verfahren zur Herstellung davon[2015/12]
English:Semiconductor device and method for manufacturing the same[2015/12]
French:Dispositif semi-conducteur et son procédé de fabrication[2015/12]
Examination procedure15.08.2014Examination requested  [2015/12]
05.11.2015Amendment by applicant (claims and/or description)
20.06.2016Application withdrawn by applicant  [2016/30]
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Documents cited:Search[X]EP2110857  (KANSAI ELECTRIC POWER CO [JP], et al) [X] 1,2,17,18 * paragraphs [0037] , [0 61]; figure 1 *;
 [X]WO9926296  (ABB RESEARCH LTD [CH], et al) [X] 1 * page 14, line 15 - line 23; figure 14 *;
 [A]EP1973165  (KANSAI ELECTRIC POWER CO [JP], et al) [A] 1-16 * the whole document *;
 [A]EP2154723  (CREE INC [US]) [A] 1-16 * figure 2A *;
 [A]WO9507548  (SIEMENS AG [DE], et al) [A] 1-16 * abstract *;
 [A]  - LOSEE P A ET AL, "Degraded Blocking Performance of 4H-SiC Rectifiers under High dV/dt Conditions", POWER SEMICONDUCTOR DEVICES AND ICS, 2005. PROCEEDINGS. ISPSD '05. THE 17TH INTERNATIONAL SYMPOSIUM ON SANTA BARBARA, CA, USA MAY 23-26, 2005, PISCATAWAY, NJ, USA,IEEE, (20050523), doi:10.1109/ISPSD.2005.1487990, ISBN 978-0-7803-8890-1, pages 219 - 222, XP010820730 [A] 1-16 * figure 1b *

DOI:   http://dx.doi.org/10.1109/ISPSD.2005.1487990
 [A]  - JANZEN E ET AL, "Intrinsic defects in high-purity SiC", MICROELECTRONIC ENGINEERING, ELSEVIER PUBLISHERS BV., AMSTERDAM, NL, vol. 83, no. 1, doi:10.1016/J.MEE.2005.10.038, ISSN 0167-9317, (20060101), pages 130 - 134, (20060101), XP024954721 [A] 17-19 * the whole document *

DOI:   http://dx.doi.org/10.1016/j.mee.2005.10.038
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.