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Extract from the Register of European Patents

EP About this file: EP2869333

EP2869333 - Semiconductor device including a semiconductor buffer structure, and method of manufacturing the semiconductor device using the semiconductor buffer structure [Right-click to bookmark this link]
Former [2015/19]Semiconductor buffer structure, semiconductor device including the semiconductor buffer structure, and method of manufacturing the semiconductor device using the semiconductor buffer structure
[2019/33]
StatusNo opposition filed within time limit
Status updated on  09.10.2020
Database last updated on 05.10.2024
FormerThe patent has been granted
Status updated on  01.11.2019
FormerGrant of patent is intended
Status updated on  03.10.2019
Most recent event   Tooltip08.07.2022Lapse of the patent in a contracting state
New state(s): MK
published on 10.08.2022  [2022/32]
Applicant(s)For all designated states
Samsung Electronics Co., Ltd.
129, Samsung-ro
Yeongtong-gu
Suwon-si
Gyeonggi-do 443-742 / KR
[2019/49]
Former [2015/19]For all designated states
Samsung Electronics Co., Ltd
129, Samsung-ro
Yeongtong-gu
Suwon-si
Gyeonggi-do 443-742 / KR
Inventor(s)01 / Kim, Jun-youn
109-903, 27
Yeongtong-ro 50beon-gil
Hwaseong-si
Gyeonggi-do / KR
02 / Tak, Young-jo
242-1203, 42, Dongtanjiseong-ro
Hwaseong-si
Gyeonggi-do / KR
03 / Kim, Jae-kyun
135-2401, 232, Dongtanbanseok-ro
Hwaseong-si
Gyeonggi-do / KR
04 / Kim, Joo-sung
510-302, 144, Mujigae-ro
Bundang-gu
Seongnam-si
Gyeonggi-do / KR
05 / Park, Young-soo
112-1502, 20, Seongbok 1-ro 164beon-gil
Suji-gu, Yongin-si
Gyeonggi-do / KR
06 / Chae, Su-hee
103-802, 56, Yeongtong-ro
154beon-gil
Yeongtong-gu, Suwon-si
Gyeonggi-do / KR
 [2015/19]
Representative(s)Elkington and Fife LLP
Prospect House
8 Pembroke Road
Sevenoaks, Kent TN13 1XR / GB
[2019/49]
Former [2015/19]Greene, Simon Kenneth
Elkington and Fife LLP
Prospect House
8 Pembroke Road
Sevenoaks, Kent TN13 1XR / GB
Application number, filing date14189626.621.10.2014
[2015/19]
Priority number, dateKR2013012554221.10.2013         Original published format: KR 20130125542
[2015/19]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP2869333
Date:06.05.2015
Language:EN
[2015/19]
Type: B1 Patent specification 
No.:EP2869333
Date:04.12.2019
Language:EN
[2019/49]
Search report(s)(Supplementary) European search report - dispatched on:EP02.04.2015
ClassificationIPC:H01L21/20
[2015/19]
CPC:
H01L33/0025 (EP,CN,US); H01L33/12 (EP,CN,KR,US); H01L21/02381 (EP,CN,US);
H01L21/02433 (EP,CN,US); H01L21/02458 (EP,CN,US); H01L21/02505 (EP,CN,US);
H01L21/0254 (EP,CN,US); H01L33/382 (EP,US); H01L2933/0016 (EP,US);
H01L33/007 (EP,CN,US); H01L33/0093 (EP,CN,US); H01L33/32 (EP,CN,US) (-)
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2015/40]
Former [2015/19]AL,  AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HR,  HU,  IE,  IS,  IT,  LI,  LT,  LU,  LV,  MC,  MK,  MT,  NL,  NO,  PL,  PT,  RO,  RS,  SE,  SI,  SK,  SM,  TR 
TitleGerman:Halbleitervorrichtung mit einer Halbleiterpufferstruktur und Verfahren zur Herstellung der Halbleitervorrichtung mit der Halbleiterpufferstruktur[2019/33]
English:Semiconductor device including a semiconductor buffer structure, and method of manufacturing the semiconductor device using the semiconductor buffer structure[2019/33]
French:Dispositif semi-conducteur comprenant une structure de tampon à semi-conductor et procédé de fabrication d'un tel dispositif utilisant ladite structure[2019/33]
Former [2015/19]Halbleiterpufferstruktur, Halbleitervorrichtung mit der Halbleiterpufferstruktur und Verfahren zur Herstellung der Halbleitervorrichtung mit der Halbleiterpufferstruktur
Former [2015/19]Semiconductor buffer structure, semiconductor device including the semiconductor buffer structure, and method of manufacturing the semiconductor device using the semiconductor buffer structure
Former [2015/19]Structure de tampon à semi-conducteur, dispositif semi-conducteur le comprenant et procédé de fabrication d'un tel dispositif utilisant ladite structure
Examination procedure19.08.2015Amendment by applicant (claims and/or description)
19.08.2015Examination requested  [2015/40]
04.10.2019Communication of intention to grant the patent
23.10.2019Fee for grant paid
23.10.2019Fee for publishing/printing paid
23.10.2019Receipt of the translation of the claim(s)
Opposition(s)07.09.2020No opposition filed within time limit [2020/46]
Fees paidRenewal fee
25.10.2016Renewal fee patent year 03
23.10.2017Renewal fee patent year 04
26.10.2018Renewal fee patent year 05
21.10.2019Renewal fee patent year 06
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Lapses during opposition  TooltipHU21.10.2014
AL04.12.2019
AT04.12.2019
CY04.12.2019
CZ04.12.2019
DK04.12.2019
EE04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
IT04.12.2019
LT04.12.2019
LV04.12.2019
MC04.12.2019
MK04.12.2019
MT04.12.2019
NL04.12.2019
PL04.12.2019
RO04.12.2019
RS04.12.2019
SE04.12.2019
SI04.12.2019
SK04.12.2019
SM04.12.2019
TR04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
IS04.04.2020
PT29.04.2020
[2022/32]
Former [2022/27]HU21.10.2014
AL04.12.2019
AT04.12.2019
CY04.12.2019
CZ04.12.2019
DK04.12.2019
EE04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
IT04.12.2019
LT04.12.2019
LV04.12.2019
MC04.12.2019
MT04.12.2019
NL04.12.2019
PL04.12.2019
RO04.12.2019
RS04.12.2019
SE04.12.2019
SI04.12.2019
SK04.12.2019
SM04.12.2019
TR04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
IS04.04.2020
PT29.04.2020
Former [2021/31]AL04.12.2019
AT04.12.2019
CZ04.12.2019
DK04.12.2019
EE04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
IT04.12.2019
LT04.12.2019
LV04.12.2019
MC04.12.2019
NL04.12.2019
PL04.12.2019
RO04.12.2019
RS04.12.2019
SE04.12.2019
SI04.12.2019
SK04.12.2019
SM04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
IS04.04.2020
PT29.04.2020
Former [2021/10]AL04.12.2019
AT04.12.2019
CZ04.12.2019
DK04.12.2019
EE04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
IT04.12.2019
LT04.12.2019
LV04.12.2019
NL04.12.2019
PL04.12.2019
RO04.12.2019
RS04.12.2019
SE04.12.2019
SI04.12.2019
SK04.12.2019
SM04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
IS04.04.2020
PT29.04.2020
Former [2020/51]AL04.12.2019
AT04.12.2019
CZ04.12.2019
DK04.12.2019
EE04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
LT04.12.2019
LV04.12.2019
NL04.12.2019
PL04.12.2019
RO04.12.2019
RS04.12.2019
SE04.12.2019
SI04.12.2019
SK04.12.2019
SM04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
IS04.04.2020
PT29.04.2020
Former [2020/47]AL04.12.2019
CZ04.12.2019
DK04.12.2019
EE04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
LT04.12.2019
LV04.12.2019
NL04.12.2019
RO04.12.2019
RS04.12.2019
SE04.12.2019
SK04.12.2019
SM04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
IS04.04.2020
PT29.04.2020
Former [2020/40]AL04.12.2019
CZ04.12.2019
EE04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
LT04.12.2019
LV04.12.2019
NL04.12.2019
RO04.12.2019
RS04.12.2019
SE04.12.2019
SK04.12.2019
SM04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
IS04.04.2020
PT29.04.2020
Former [2020/37]AL04.12.2019
CZ04.12.2019
EE04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
LT04.12.2019
LV04.12.2019
NL04.12.2019
RO04.12.2019
RS04.12.2019
SE04.12.2019
SK04.12.2019
SM04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
PT29.04.2020
Former [2020/36]AL04.12.2019
CZ04.12.2019
EE04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
LT04.12.2019
LV04.12.2019
NL04.12.2019
RO04.12.2019
RS04.12.2019
SE04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
PT29.04.2020
Former [2020/35]AL04.12.2019
CZ04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
LT04.12.2019
LV04.12.2019
NL04.12.2019
RO04.12.2019
RS04.12.2019
SE04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
Former [2020/32]AL04.12.2019
ES04.12.2019
FI04.12.2019
HR04.12.2019
LT04.12.2019
LV04.12.2019
NL04.12.2019
RS04.12.2019
SE04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
Former [2020/26]ES04.12.2019
FI04.12.2019
HR04.12.2019
LT04.12.2019
LV04.12.2019
RS04.12.2019
SE04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
Former [2020/23]ES04.12.2019
FI04.12.2019
LT04.12.2019
LV04.12.2019
SE04.12.2019
BG04.03.2020
NO04.03.2020
GR05.03.2020
Former [2020/22]FI04.12.2019
LT04.12.2019
SE04.12.2019
BG04.03.2020
NO04.03.2020
Former [2020/21]NO04.03.2020
Documents cited:Search[XI]US2005110043  (OTSUKA KOJI [JP], et al) [X] 1-12 * paragraph [0026] - paragraph [0091]; figures 1-8 * [I] 13-15;
 [XI]JP2009289956  (FURUKAWA ELECTRIC CO LTD) [X] 1-12 * paragraph [0019] - paragraph [0078]; figures 1-30 * [I] 13-15;
 [XI]EP2554719  (NGK INSULATORS LTD [JP]) [X] 1-12 * paragraph [0016] - paragraph [0128]; figure 1 * [I] 13-15;
 [XI]  - FELTIN E ET AL, "STRESS CONTROL IN GAN GROWN ON SILICON (111) BY METALORGANIC VAPOR PHASE EPITAXY", APPLIED PHYSICS LETTERS, AMERICAN INSTITUTE OF PHYSICS, US, (20011112), vol. 79, no. 20, doi:10.1063/1.1415043, ISSN 0003-6951, pages 3230 - 3232, XP001102889 [X] 1-12 * page 3230 - page 3233; figure 1 * [I] 13-15

DOI:   http://dx.doi.org/10.1063/1.1415043
 [XI]  - E. FELTIN ET AL, "Crack-Free Thick GaN Layers on Silicon (111) by Metalorganic Vapor Phase Epitaxy", PHYSICA STATUS SOLIDI (A), (20011201), vol. 188, no. 2, doi:10.1002/1521-396X(200112)188:2<531::AID-PSSA531>3.0.CO;2-V, ISSN 0031-8965, pages 531 - 535, XP055097616 [X] 1-12 * page 531 - page 535; figure 1 * [I] 13-15

DOI:   http://dx.doi.org/10.1002/1521-396X(200112)188:2<531::AID-PSSA531>3.0.CO;2-V
 [A]  - BLÄSING J ET AL, "The origin of stress reduction by low-temperature AlN interlayers", APPLIED PHYSICS LETTERS, AMERICAN INSTITUTE OF PHYSICS, US, (20021007), vol. 81, no. 15, doi:10.1063/1.1512331, ISSN 0003-6951, pages 2722 - 2724, XP012032114 [A] 1-15

DOI:   http://dx.doi.org/10.1063/1.1512331
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