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Extract from the Register of European Patents

EP About this file: EP3311483

EP3311483 - BIAS CIRCUITRY FOR DEPLETION MODE AMPLIFIERS [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  05.01.2024
Database last updated on 15.06.2024
FormerThe patent has been granted
Status updated on  27.01.2023
FormerGrant of patent is intended
Status updated on  06.09.2022
FormerExamination is in progress
Status updated on  11.02.2021
FormerRequest for examination was made
Status updated on  23.03.2018
FormerThe international publication has been made
Status updated on  23.12.2016
Most recent event   Tooltip10.05.2024Lapse of the patent in a contracting state
New state(s): BE, CH
published on 12.06.2024  [2024/24]
Applicant(s)For all designated states
Raytheon Company
870 Winter Street
Waltham, MA 02451-1449 / US
[2018/17]
Inventor(s)01 / BETTENCOURT, John P.
7 Wadsworth Street
Danvers, Massachusetts 01923 / US
02 / BIELUNIS, Alan J.
23 Meadowbrook Road
Derry, NH 03038 / US
03 / RODRIGUEZ, Istvan
160 Commandants Way
Chelsea, Massachusetts 02150 / US
04 / WANG, Zhaoyang C.
78 Daniels Lane
Carlisle, Massachusetts 01741-1055 / US
 [2018/17]
Representative(s)Carpmaels & Ransford LLP
One Southampton Row
London WC1B 5HA / GB
[2018/17]
Application number, filing date16733245.109.06.2016
[2018/17]
WO2016US36546
Priority number, dateUS201562181713P18.06.2015         Original published format: US 201562181713 P
US20161517561007.06.2016         Original published format: US201615175610
[2018/17]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2016205049
Date:22.12.2016
Language:EN
[2016/51]
Type: A1 Application with search report 
No.:EP3311483
Date:25.04.2018
Language:EN
The application published by WIPO in one of the EPO official languages on 22.12.2016 takes the place of the publication of the European patent application.
[2018/17]
Type: B1 Patent specification 
No.:EP3311483
Date:01.03.2023
Language:EN
[2023/09]
Search report(s)International search report - published on:EP22.12.2016
ClassificationIPC:H03F1/30, H03F3/19, H03F3/193, H03F3/195, H03F3/72
[2018/17]
CPC:
H03F3/195 (EP,CN,US); H03F1/303 (EP,CN,US); H03F3/193 (EP,CN,US);
H03F3/213 (US); H03F3/72 (EP,CN,US); H03F1/301 (US);
H03F2200/18 (EP,CN,US); H03F2200/258 (EP,US); H03F2200/27 (EP,CN,US);
H03F2200/451 (EP,CN,US); H03F2203/7203 (EP,CN,US) (-)
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2018/17]
Extension statesBANot yet paid
MENot yet paid
Validation statesMANot yet paid
MDNot yet paid
TitleGerman:VORSPANNUNGSSCHALTUNG FÜR VERSTÄRKER VOM VERARMUNGSTYP[2018/17]
English:BIAS CIRCUITRY FOR DEPLETION MODE AMPLIFIERS[2018/17]
French:CIRCUITS DE POLARISATION POUR AMPLIFICATEURS EN MODE D'APPAUVRISSEMENT[2018/17]
Entry into regional phase10.01.2018National basic fee paid 
10.01.2018Designation fee(s) paid 
10.01.2018Examination fee paid 
Examination procedure10.01.2018Examination requested  [2018/17]
10.01.2018Date on which the examining division has become responsible
31.07.2018Amendment by applicant (claims and/or description)
10.02.2021Despatch of a communication from the examining division (Time limit: M04)
22.04.2021Reply to a communication from the examining division
18.02.2022Despatch of a communication from the examining division (Time limit: M04)
21.04.2022Reply to a communication from the examining division
07.09.2022Communication of intention to grant the patent
13.01.2023Fee for grant paid
13.01.2023Fee for publishing/printing paid
13.01.2023Receipt of the translation of the claim(s)
Divisional application(s)EP22213788.7  / EP4170902
Opposition(s)04.12.2023No opposition filed within time limit [2024/06]
Fees paidRenewal fee
11.06.2018Renewal fee patent year 03
13.06.2019Renewal fee patent year 04
31.03.2020Renewal fee patent year 05
14.06.2021Renewal fee patent year 06
21.06.2022Renewal fee patent year 07
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Lapses during opposition  TooltipAT01.03.2023
CZ01.03.2023
DK01.03.2023
EE01.03.2023
ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
MC01.03.2023
NL01.03.2023
PL01.03.2023
RO01.03.2023
RS01.03.2023
SE01.03.2023
SI01.03.2023
SK01.03.2023
SM01.03.2023
NO01.06.2023
GR02.06.2023
IE09.06.2023
LU09.06.2023
BE30.06.2023
CH30.06.2023
IS01.07.2023
PT03.07.2023
[2024/24]
Former [2024/21]AT01.03.2023
CZ01.03.2023
DK01.03.2023
EE01.03.2023
ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
MC01.03.2023
NL01.03.2023
PL01.03.2023
RO01.03.2023
RS01.03.2023
SE01.03.2023
SI01.03.2023
SK01.03.2023
SM01.03.2023
NO01.06.2023
GR02.06.2023
IE09.06.2023
LU09.06.2023
IS01.07.2023
PT03.07.2023
Former [2024/15]AT01.03.2023
CZ01.03.2023
DK01.03.2023
EE01.03.2023
ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
MC01.03.2023
NL01.03.2023
PL01.03.2023
RO01.03.2023
RS01.03.2023
SE01.03.2023
SI01.03.2023
SK01.03.2023
SM01.03.2023
NO01.06.2023
GR02.06.2023
LU09.06.2023
IS01.07.2023
PT03.07.2023
Former [2024/10]AT01.03.2023
CZ01.03.2023
DK01.03.2023
EE01.03.2023
ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
MC01.03.2023
NL01.03.2023
PL01.03.2023
RO01.03.2023
RS01.03.2023
SE01.03.2023
SI01.03.2023
SK01.03.2023
SM01.03.2023
NO01.06.2023
GR02.06.2023
IS01.07.2023
PT03.07.2023
Former [2024/09]AT01.03.2023
CZ01.03.2023
DK01.03.2023
EE01.03.2023
ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
MC01.03.2023
NL01.03.2023
PL01.03.2023
RO01.03.2023
RS01.03.2023
SE01.03.2023
SK01.03.2023
SM01.03.2023
NO01.06.2023
GR02.06.2023
IS01.07.2023
PT03.07.2023
Former [2023/50]AT01.03.2023
CZ01.03.2023
EE01.03.2023
ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
NL01.03.2023
PL01.03.2023
RO01.03.2023
RS01.03.2023
SE01.03.2023
SK01.03.2023
SM01.03.2023
NO01.06.2023
GR02.06.2023
IS01.07.2023
PT03.07.2023
Former [2023/49]AT01.03.2023
CZ01.03.2023
EE01.03.2023
ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
NL01.03.2023
PL01.03.2023
RO01.03.2023
RS01.03.2023
SE01.03.2023
SM01.03.2023
NO01.06.2023
GR02.06.2023
PT03.07.2023
Former [2023/48]AT01.03.2023
EE01.03.2023
ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
NL01.03.2023
PL01.03.2023
RS01.03.2023
SE01.03.2023
SM01.03.2023
NO01.06.2023
GR02.06.2023
PT03.07.2023
Former [2023/46]ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
NL01.03.2023
PL01.03.2023
RS01.03.2023
SE01.03.2023
SM01.03.2023
NO01.06.2023
GR02.06.2023
PT03.07.2023
Former [2023/38]ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
NL01.03.2023
PL01.03.2023
RS01.03.2023
SE01.03.2023
NO01.06.2023
GR02.06.2023
Former [2023/37]ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
RS01.03.2023
SE01.03.2023
NO01.06.2023
GR02.06.2023
Former [2023/36]ES01.03.2023
FI01.03.2023
HR01.03.2023
LT01.03.2023
LV01.03.2023
RS01.03.2023
SE01.03.2023
NO01.06.2023
Former [2023/35]ES01.03.2023
HR01.03.2023
LT01.03.2023
RS01.03.2023
NO01.06.2023
Former [2023/34]ES01.03.2023
LT01.03.2023
RS01.03.2023
Former [2023/33]ES01.03.2023
LT01.03.2023
Cited inInternational search[XI]WO9723037  (ANADIGICS INC [US]) [X] 1-3,5 * page 6, line 5 - page 33, line 4; figures 14-20 * [I] 4,6,7;
 [XI]US2010039168  (BETTENCOURT JOHN P [US]) [X] 1,3,5,7 * paragraphs [0011] - [0027]; figures 1,2; claim 10 * [I] 2,4,6;
 [A]EP2816729  (INT RECTIFIER CORP [US]) [A] 1-7 * paragraphs [0002] - [0042]; figures 1-5 *;
 [A]  - BONN F, "BIAS SCHEMES FOR ENHANCEMENT AND DEPLETION MODE GAASFETS IN SOURCE-FOLLOWER CONFIGURATION", MOTOROLA TECHNICAL DEVELOPMENTS, MOTOROLA INC. SCHAUMBURG, ILLINOIS, US, (19930301), vol. 18, ISSN 0887-5286, pages 88 - 90, XP000349571 [A] 1-7 * page 88, column L, line 2 - column R, line 3; figure 2 *
ExaminationWO9838733
by applicantUS6600301
 US8854140
    - KAZIOR, T.E.; CHELAKARA, R.; HOKE, W.; BETTENCOURT, J.; PALACIOS, T.; LEE, H.S, "High Performance Mixed Signal and RF Circuits Enabled by the Direct Monolithic Heterogeneous Integration of GaN HEMTs and Si CMOS on a Silicon Substrate", COMPOUND SEMICONDUCTOR INTEGRATED CIRCUIT SYMPOSIUM (CSICS, (2011), doi:doi:10.1109/CSICS.2011.6062443, pages 1 - 4, XP032067999

DOI:   http://dx.doi.org/10.1109/CSICS.2011.6062443
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.