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EP3244219
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Extract from the Register of European Patents
EP About this file: EP3244219
| EP3244219 - INTEGRATED LINEAR CURRENT SENSE CIRCUITRY FOR SEMICONDUCTOR TRANSISTOR DEVICES [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 05.10.2018 Database last updated on 11.09.2024 | |
| Former | Request for examination was made Status updated on 13.10.2017 | Most recent event Tooltip | 05.10.2018 | Application deemed to be withdrawn | published on 07.11.2018 [2018/45] | Applicant(s) | For all designated states Power Integrations, Inc. 5245 Hellyer Avenue San Jose, CA 95138 / US | [2017/46] | Inventor(s) | 01 /
Mayell, Robert 421 Valencia Drive Los Altos, CA California 94022 / US | [2017/46] | Representative(s) | Conroy, John Fish & Richardson P.C. Highlight Business Towers Mies-van-der-Rohe-Straße 8 80807 München / DE | [2017/46] | Application number, filing date | 17170829.0 | 12.05.2017 | [2017/46] | Priority number, date | US201615154702 | 13.05.2016 Original published format: US201615154702 | [2017/46] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP3244219 | Date: | 15.11.2017 | Language: | EN | [2017/46] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 12.10.2017 | Classification | IPC: | G01R19/00, H03K19/003 | [2017/46] | CPC: |
G01R19/0092 (EP,CN,US);
G01R31/3272 (CN);
G01R31/2621 (CN);
H01L27/0623 (US);
H01L29/2003 (US);
H01L29/778 (US)
| Designated contracting states | AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR [2017/46] | Extension states | BA | Not yet paid | ME | Not yet paid | Validation states | MA | Not yet paid | MD | Not yet paid | Title | German: | INTEGRIERTE LINEARE STROMMESSSCHALTUNG FÜR HALBLEITERTRANSISTORVORRICHTUNGEN | [2017/46] | English: | INTEGRATED LINEAR CURRENT SENSE CIRCUITRY FOR SEMICONDUCTOR TRANSISTOR DEVICES | [2017/46] | French: | CIRCUIT DE DÉTECTION DE COURANT LINÉAIRE INTÉGRÉ POUR DISPOSITIFS DE TRANSISTOR À SEMI-CONDUCTEUR | [2017/46] | Examination procedure | 12.05.2017 | Examination requested [2017/46] | 12.05.2017 | Date on which the examining division has become responsible | 16.05.2018 | Application deemed to be withdrawn, date of legal effect [2018/45] | 22.06.2018 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time [2018/45] |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [XI]US2011248702 (KUME TOMOHIRO [JP]) [X] 1-10,12-15 * abstract * * paragraph [0014] - paragraph [0035] * * paragraph [0046] - paragraph [0067] * * paragraph [0072] - paragraph [0074] * [I] 11; | [XI]US2015309524 (LEVHAR GABI [IL], et al) [X] 1-10,12,13 * abstract * * paragraph [0004] - paragraph [0006] * [I] 11,14,15; | [XI]US2002093366 (FOTOUHI BAHRAM [US]) [X] 1-10,12,13 * abstract * * paragraph [0012] * * paragraph [0060] * [I] 11,14,15; | [XI]US6323703 (FOTOUHI BAHRAM [US]) [X] 1-10,12,13 * abstract * * column 2, line 47 - line 64 * * column 5, line 52 - column 9, line 10 * [I] 11,14,15; | [XI]JPH11202002 (NEC CORP) [X] 1-10,12,13 * abstract * [I] 11,14,15 |