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EP3542464
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EP About this file: EP3542464
| EP3542464 - CONTROL SYSTEM FOR A RECONFIGURABLE INTEGRATED CIRCUIT [Right-click to bookmark this link] | Status | The application has been withdrawn Status updated on 10.12.2021 Database last updated on 11.09.2024 | |
| Former | Examination is in progress Status updated on 11.06.2021 | ||
| Former | Request for examination was made Status updated on 23.08.2019 | ||
| Former | The international publication has been made Status updated on 16.06.2018 | Most recent event Tooltip | 10.12.2021 | Withdrawal of application | published on 12.01.2022 [2022/02] | Applicant(s) | For all designated states Nokia of America Corporation 600-700 Mountain Avenue Murray Hill, NJ 07974-0636 / US | For all designated states Nokia Solutions and Networks Oy Karakaari 7 02610 Espoo / FI | [2019/39] | Inventor(s) | 01 /
ZAMBURG, Evgeny Karaportti 3 02610 Espoo / FI | 02 /
DE LIND VAN WIJNGAARDEN, Adriaan 600-700 Mountain Avenue Murray Hill, NJ 07974-0636 / US | 03 /
SUVAKOVIC, Dusan 600-700 Mountain Avenue Murray Hill, NJ 07974-0636 / US | [2019/39] | Representative(s) | Swindell & Pearson Limited 48 Friar Gate Derby DE1 1GY / GB | [2019/39] | Application number, filing date | 17878812.1 | 08.12.2017 | [2019/39] | WO2017US65413 | Priority number, date | US201662432374P | 09.12.2016 Original published format: US 201662432374 P | [2019/39] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO2018107090 | Date: | 14.06.2018 | Language: | EN | [2018/24] | Type: | A1 Application with search report | No.: | EP3542464 | Date: | 25.09.2019 | Language: | EN | The application published by WIPO in one of the EPO official languages on 14.06.2018 takes the place of the publication of the European patent application. | [2019/39] | Search report(s) | International search report - published on: | US | 14.06.2018 | (Supplementary) European search report - dispatched on: | EP | 30.06.2020 | Classification | IPC: | H03K19/1776, H03K19/094, H03K19/17736, H03K19/17748, H03K19/17732, H03K19/17704, H03K19/00 | [2020/31] | CPC: |
H03K19/17732 (EP);
H03K19/17712 (EP,US);
G11C13/0069 (US);
H01R29/00 (US);
H03K19/17736 (EP);
H03K19/17748 (EP);
|
| Former IPC [2019/39] | H03K19/177, H03K19/094 | Designated contracting states | AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR [2019/39] | Title | German: | STEUERUNGSSYSTEM FÜR EINE REKONFIGURIERBARE INTEGRIERTE SCHALTUNG | [2019/39] | English: | CONTROL SYSTEM FOR A RECONFIGURABLE INTEGRATED CIRCUIT | [2019/39] | French: | SYSTÈME DE COMMANDE DE CIRCUIT INTÉGRÉ RECONFIGURABLE | [2019/39] | Entry into regional phase | 17.06.2019 | National basic fee paid | 17.06.2019 | Search fee paid | 17.06.2019 | Designation fee(s) paid | 17.06.2019 | Examination fee paid | Examination procedure | 17.06.2019 | Examination requested [2019/39] | 21.01.2021 | Amendment by applicant (claims and/or description) | 11.06.2021 | Despatch of a communication from the examining division (Time limit: M06) | 03.12.2021 | Application withdrawn by applicant [2022/02] | Fees paid | Renewal fee | 13.12.2019 | Renewal fee patent year 03 | 14.12.2020 | Renewal fee patent year 04 | 10.11.2021 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [XI]US2006081962 (WEI ZHIQIANG [JP], et al) [X] 1-6,8-15 * paragraphs [0074] , [0079] , [0080]; figures 2B, 2C * * paragraphs [0196] - [0203]; figure 19 * [I] 7; | [XI]US2016035419 (ZAITSU KOICHIRO [JP], et al) [X] 1-6,8-15 * paragraphs [0025] , [0026]; figures 1,2 * * paragraphs [0027] , [0028]; figure 3 * * paragraphs [0029] - [0031]; figure 4 * [I] 7; | [XI] - CONG JASON ET AL, "FPGA-RPI: A Novel FPGA Architecture With RRAM-Based Programmable Interconnects", IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 22, no. 4, doi:10.1109/TVLSI.2013.2259512, ISSN 1063-8210, (20140401), pages 864 - 877, (20140318), XP011543505 [X] 1,2,5-15 * figure 6 * * page 868, paragraph D.; figure 9 * * figure 11 * [I] 3,4,7 DOI: http://dx.doi.org/10.1109/TVLSI.2013.2259512 | International search | [YA]US2016329900 (THIAGARAJAN EASHWAR [US], et al) [Y] 1-4, 9-13, 15 * ; abstract, figure 4, paragraphs [0045], [0046], [0121], [0123], claim 1 * [A] 14, 16; | [YA]US7902857 (PINO ROBINSON E [US]) [Y] 1-4, 9-13, 15, 17, 18 * ; figure 1, column 3, line 65-column 4, line 27, column 4, lines 46-65, claims 1, 2 * [A] 16, 19; | [YA]WO2015167438 (HEWLETT PACKARD DEVELOPMENT CO [US]) [Y] 3, 4, 18 * ; figure 1, paragraphs [0015], [0019], [0024], [0039], claim 1 * [A] 5-8, 19; | [Y]US4972470 (FARAGO STEVEN [US]) [Y] 11-13 * ; column 2, lines 48-64, claim 7 *; | [YA]US5668419 (OKTAY OSMAN OZAY [US]) [Y] 17, 18 * ; abstract, column 5, lines 25-30, column 6, lines 40-59, column 8, lines 42-39, claim 6 * [A] 5-8, 14 | by applicant | US2006081962 | US2016035419 | - CONG, FPGA-RPI: A Novel FPGA Architecture with RRAM-Based Programmable Interconnects |