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Extract from the Register of European Patents

EP About this file: EP3941875

EP3941875 - SEMICONDUCTOR STRUCTURES [Right-click to bookmark this link]
StatusRequest for examination was made
Status updated on  24.12.2021
Database last updated on 14.09.2024
FormerThe international publication has been made
Status updated on  02.10.2020
Formerunknown
Status updated on  17.04.2020
Most recent event   Tooltip08.05.2024New entry: Additional fee for renewal fee: despatch of communication + time limit 
Applicant(s)For all designated states
Cirrus Logic International Semiconductor Limited
7B Nightingale Way
Quartermile
Edinburgh, Lothian EH3 9EG / GB
[2022/04]
Inventor(s)01 / ACHEHBOUNE, Rkia
c/o Cirrus Logic International Semiconductor
Limited 7B Nightingale Way Quartermile
Edinburgh Lothian EH3 9EG / GB
02 / BRIOSCHI, Roberto
c/o Cirrus Logic, Inc. 800 West 6th Street
Austin, Texas / US
[N/P]
Former [2022/04]01 / ACHEHBOUNE, Rkia
Edinburgh Lothian EH3 9EG / GB
02 / BRIOSCHI, Roberto
Austin, Texas / US
Representative(s)Haseltine Lake Kempner LLP
Cheapside House
138 Cheapside
London EC2V 6BJ / GB
[2022/04]
Application number, filing date20716864.219.03.2020
[2022/04]
WO2020GB50736
Priority number, dateUS201962822268P22.03.2019         Original published format: US 201962822268 P
GB2019000592129.04.2019         Original published format: GB 201905921
GB2019000592229.04.2019         Original published format: GB 201905922
GB2019000592329.04.2019         Original published format: GB 201905923
[2022/04]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2020193955
Date:01.10.2020
Language:EN
[2020/40]
Type: A1 Application with search report 
No.:EP3941875
Date:26.01.2022
Language:EN
The application published by WIPO in one of the EPO official languages on 01.10.2020 takes the place of the publication of the European patent application.
[2022/04]
Search report(s)International search report - published on:EP01.10.2020
ClassificationIPC:B81C1/00
[2022/04]
CPC:
B81C1/00253 (EP); B81C1/0023 (GB); H04R19/04 (EP,US);
B81B7/0058 (US); B81B7/0061 (US); B81B7/0064 (US);
H01L24/95 (GB); H01L25/04 (GB); H04R19/005 (EP);
H04R31/00 (EP); B81B2201/0257 (EP,US); B81B2203/0127 (US);
B81B2203/0315 (US); B81B2207/012 (US); B81C2203/032 (EP);
B81C2203/0792 (EP); H04R1/04 (EP); H04R2201/003 (US) (-)
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2022/04]
TitleGerman:HALBLEITERSTRUKTUREN[2022/04]
English:SEMICONDUCTOR STRUCTURES[2022/04]
French:STRUCTURES SEMI-CONDUCTRICES[2022/04]
Entry into regional phase15.09.2021National basic fee paid 
15.09.2021Designation fee(s) paid 
15.09.2021Examination fee paid 
Examination procedure15.09.2021Amendment by applicant (claims and/or description)
15.09.2021Examination requested  [2022/04]
15.09.2021Date on which the examining division has become responsible
Fees paidRenewal fee
28.03.2022Renewal fee patent year 03
27.03.2023Renewal fee patent year 04
Penalty fee
Additional fee for renewal fee
31.03.202405   M06   Not yet paid
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Cited inInternational search[X]US2010195299  (SOURIAU JEAN-CHARLES [FR], et al) [X] 1-5,9 * figures 1A,1B,2 * * figures 4E-4H *;
 [I]US2017313579  (GHIDONI MARCO OMAR [IT], et al) [I] 1-17 * figures 1,5 *;
 [A]US2018146302  (CHEN JEN-YI [TW], et al) [A] 1-17* figures 2,8 *;
 [XI]US2018295458  (STEIERT MATTHIAS [DE], et al) [X] 9-15 * figures 11A - 11G * [I] 1-8,16,17
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.