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EP4287262
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EP About this file: EP4287262
| EP4287262 - TRANSISTOR INTEGRATION ON A SILICON-ON-INSULATOR SUBSTRATE [Right-click to bookmark this link] | Status | Request for examination was made Status updated on 03.11.2023 Database last updated on 02.08.2024 | Most recent event Tooltip | 05.06.2024 | The date on which the examining division becomes responsible, has been established | 05.06.2024 | Amendment by applicant | Applicant(s) | For all designated states GlobalFoundries U.S. Inc. 400 Stonebreak Road Extension Malta, NY 12020 / US | [2023/49] | Inventor(s) | 01 /
BAARS, Peter Malta, 12020 / US | 02 /
ONTALUS, Viorel Malta, 12020 / US | 03 /
TAILOR, Ketankumar H. Malta, 12020 / US | 04 /
ZIER, Michael Malta, 12020 / US | 05 /
KENNEY, Crystal R. Malta, 12020 / US | 06 /
HOLT, Judson Malta, 12020 / US | [2023/49] | Representative(s) | Grünecker Patent- und Rechtsanwälte PartG mbB Leopoldstraße 4 80802 München / DE | [2023/49] | Application number, filing date | 22201887.1 | 17.10.2022 | [2023/49] | Priority number, date | US202217830830 | 02.06.2022 Original published format: US202217830830 | [2023/49] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP4287262 | Date: | 06.12.2023 | Language: | EN | [2023/49] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 25.05.2023 | Classification | IPC: | H01L29/08, H01L29/06, H01L29/737, H01L21/331, H01L21/762, H01L27/06, H01L27/12 | [2023/49] | CPC: |
H01L29/0821 (EP);
H01L27/1207 (EP,US);
H01L21/761 (EP);
H01L21/84 (US);
H01L29/0649 (EP);
H01L29/66242 (EP,US);
H01L29/7371 (EP);
H01L21/76224 (EP);
H01L21/8249 (EP);
H01L27/0623 (EP)
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| Designated contracting states | AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, ME, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR [2023/49] | Extension states | BA | Not yet paid | Validation states | KH | Not yet paid | MA | Not yet paid | MD | Not yet paid | TN | Not yet paid | Title | German: | TRANSISTORINTEGRATION AUF EINEM SILIZIUM-AUF-ISOLATOR-SUBSTRAT | [2023/49] | English: | TRANSISTOR INTEGRATION ON A SILICON-ON-INSULATOR SUBSTRATE | [2023/49] | French: | INTÉGRATION DE TRANSISTOR SUR UN SUBSTRAT DE SILICIUM SUR ISOLANT | [2023/49] | Examination procedure | 17.10.2022 | Examination requested [2023/49] | 05.06.2024 | Amendment by applicant (claims and/or description) | 05.06.2024 | Date on which the examining division has become responsible |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [I]US6555891 (FURUKAWA TOSHIHARU [US], et al) [I] 1-15 * column 8, line 45 - column 9, line 43 * * figure 16 *; | [YA]US6936910 (ELLIS-MONAGHAN JOHN JOSEPH [US], et al) [Y] 3,4,9-11 * abstract *[A] 1,2,5-8,12-15; | [XYI]US2017358608 (VERMA PURAKH RAJ [SG], et al) [X] 1,2,5,6,11-15 * paragraph [0044] - paragraph [0046] * * paragraph [0053] - paragraph [0054] * * figures 3a-3c,5a,5b * [Y] 3,4,10 [I] 7-9; | [XY]US2019273028 (JAIN VIBHOR [US], et al) [X] 1,2,5-9,11-15 * paragraph [0011] - paragraph [0022] * * figures 1-5 * [Y] 3,4,10; | [XY]US11145725 (LIU QIZHI [US], et al) [X] 1,2,5-8,12-15 * column 2, line 54 - column 6, line 63 * * figures 1-8 * [Y] 3,4,9-11 |