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Extract from the Register of European Patents

EP About this file: EP4280268

EP4280268 - SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR [Right-click to bookmark this link]
StatusRequest for examination was made
Status updated on  20.10.2023
Database last updated on 02.09.2024
FormerThe international publication has been made
Status updated on  22.07.2022
Most recent event   Tooltip22.03.2024Change: Validation statespublished on 24.04.2024  [2024/17]
22.03.2024Change - extension statespublished on 24.04.2024  [2024/17]
Applicant(s)For all designated states
LG Innotek Co., Ltd.
30, Magokjungang 10-ro
Gangseo-gu
Seoul 07796 / KR
[2023/47]
Inventor(s)01 / CHOI, Tae Sup
Seoul 07796 / KR
02 / KANG, Woon
Seoul 07796 / KR
03 / YOON, Jin Ho
Seoul 07796 / KR
 [2023/47]
Representative(s)DREISS Patentanwälte PartG mbB
Friedrichstraße 6
70174 Stuttgart / DE
[2023/47]
Application number, filing date22739840.118.01.2022
[2023/47]
WO2022KR00942
Priority number, dateKR2021000659018.01.2021         Original published format: KR 20210006590
[2023/47]
Filing languageKO
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2022154648
Date:21.07.2022
Language:KO
[2022/29]
Type: A1 Application with search report 
No.:EP4280268
Date:22.11.2023
Language:EN
[2023/47]
Search report(s)International search report - published on:KR21.07.2022
ClassificationIPC:H01L23/29, H01L23/00, H01L23/492, H01L23/50
[2023/47]
CPC:
H01L24/16 (EP,US); H01L23/293 (KR,US); H01L24/81 (US);
H01L21/563 (EP,US); H01L23/492 (KR); H01L23/50 (KR);
H01L24/10 (KR); H01L24/26 (KR); H01L24/29 (US);
H01L24/32 (US); H01L24/73 (US); H01L24/83 (KR,US);
H01L24/92 (US); H01L2224/1131 (US); H01L2224/16225 (EP);
H01L2224/16227 (US); H01L2224/2731 (US); H01L2224/29015 (US);
H01L2224/2919 (US); H01L2224/32225 (EP,US); H01L2224/73204 (EP,US);
H01L2224/81192 (US); H01L2224/8121 (US); H01L2224/81395 (US);
H01L2224/81447 (US); H01L2224/8149 (US); H01L2224/81815 (US);
H01L2224/81862 (US); H01L2224/81906 (US); H01L2224/83102 (US);
H01L2224/83191 (US); H01L2224/8321 (US); H01L2224/83862 (US);
H01L2224/9211 (US); H01L2924/0665 (US); H01L2924/069 (US) (-)
C-Set:
H01L2224/73204, H01L2224/16225, H01L2224/32225, H01L2924/00 (EP)
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2023/47]
TitleGerman:HALBLEITERGEHÄUSE UND HERSTELLUNGSVERFAHREN DAFÜR[2023/47]
English:SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR[2023/47]
French:BOÎTIER DE SEMI-CONDUCTEUR ET SON PROCÉDÉ DE FABRICATION[2023/47]
Entry into regional phase29.06.2023Translation filed 
29.06.2023National basic fee paid 
29.06.2023Search fee paid 
29.06.2023Designation fee(s) paid 
29.06.2023Examination fee paid 
Examination procedure29.06.2023Amendment by applicant (claims and/or description)
29.06.2023Examination requested  [2023/47]
Fees paidRenewal fee
25.01.2024Renewal fee patent year 03
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Cited inInternational search[A]KR100536978B  ;
 [Y]KR100823699B  (SAMSUNG ELECTRONICS CO LTD [KR]);
 [A]KR20120065595  (KWON OH TAE [KR]);
 [Y]KR20140102597  (PANASONIC CORP [JP]);
 [A]JP2018029176  (PANASONIC IP MAN CORP)
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.