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EP4339783
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EP About this file: EP4339783
| EP4339783 - DEBUG AND TRACE CIRCUIT IN LOCKSTEP ARCHITECTURES, ASSOCIATED METHOD, PROCESSING SYSTEM, AND APPARATUS [Right-click to bookmark this link] | Status | Request for examination was made Status updated on 24.05.2024 Database last updated on 02.09.2024 | |
| Former | The application has been published Status updated on 16.02.2024 | Most recent event Tooltip | 10.08.2024 | Change - representative | Applicant(s) | For all designated states STMicroelectronics International N.V. Chemin du Champ des Filles 39 1228 Plan-les-Ouates, Geneva / CH | [2024/12] | Inventor(s) | 01 /
GOYAL, Avneep Kumar 201308 Greater Noida / IN | 02 /
ARORA, Anubhav 122001 Gurugram, Harayana / IN | [2024/12] | Representative(s) | Buzzi, Notaro & Antonielli d'Oulx S.p.A. Corso Vittorio Emmanuele II, 6 10123 Torino / IT | [N/P] |
| Former [2024/12] | Ferrero, Alberto Buzzi, Notaro & Antonielli d'Oulx S.p.A. Corso Vittorio Emanuele II, 6 IT-10123 Torino / IT | Application number, filing date | 23193443.1 | 25.08.2023 | [2024/12] | Priority number, date | US202217945576 | 15.09.2022 Original published format: US202217945576 | [2024/12] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP4339783 | Date: | 20.03.2024 | Language: | EN | [2024/12] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 05.02.2024 | Classification | IPC: | G06F11/16, G06F11/36 | [2024/12] | CPC: |
G06F11/1641 (EP);
G06F11/3013 (CN);
G01R31/31705 (US);
G01R31/31726 (US);
G01R31/318597 (US);
G06F11/3051 (CN);
G06F11/3089 (CN);
G06F11/327 (CN);
G06F11/3476 (CN);
G06F11/348 (CN);
G06F11/3648 (EP);
G06F13/4068 (CN);
G06F11/3632 (EP)
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| Designated contracting states | AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, ME, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR [2024/26] |
| Former [2024/12] | AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, ME, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR | Extension states | BA | Not yet paid | Validation states | KH | Not yet paid | MA | Not yet paid | MD | Not yet paid | TN | Not yet paid | Title | German: | DEBUG- UND TRACE-SCHALTUNG IN LOCKSTEP-ARCHITEKTUREN, ZUGEHÖRIGES VERFAHREN, VERARBEITUNGSSYSTEM UND VORRICHTUNG | [2024/12] | English: | DEBUG AND TRACE CIRCUIT IN LOCKSTEP ARCHITECTURES, ASSOCIATED METHOD, PROCESSING SYSTEM, AND APPARATUS | [2024/12] | French: | DÉBOGAGE ET CIRCUIT DE TRAÇAGE DANS DES ARCHITECTURES À VERROUILLAGE DE PAS, PROCÉDÉ, SYSTÈME DE TRAITEMENT ET APPAREIL ASSOCIÉS | [2024/12] | Examination procedure | 22.05.2024 | Amendment by applicant (claims and/or description) | 22.05.2024 | Examination requested [2024/26] | 22.05.2024 | Date on which the examining division has become responsible |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]US2010262811 (MOYER WILLIAM C [US], et al); | [A]US2019094830 (NISHIKAWA TAKURO [JP], et al) |