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Extract from the Register of European Patents

EP About this file: EP4373038

EP4373038 - PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD [Right-click to bookmark this link]
StatusRequest for examination was made
Status updated on  26.07.2024
Database last updated on 11.09.2024
FormerThe application has been published
Status updated on  19.04.2024
Most recent event   Tooltip10.08.2024Change - representative 
Applicant(s)For all designated states
STMicroelectronics Application GmbH
Bahnhofstrasse 18
85609 Aschheim-Dornach / DE
For all designated states
STMicroelectronics S.r.l.
Via C. Olivetti, 2
20864 Agrate Brianza (MB) / IT
[2024/21]
Inventor(s)01 / DONDINI, Mirko
I-95126 Catania / IT
02 / TRECARICHI, Calogero Andrea
I-93012 Gela (Caltanissetta) / IT
03 / RENNIG, Fred
D-85405 Nandlstadt / DE
 [2024/21]
Representative(s)Buzzi, Notaro & Antonielli d'Oulx S.p.A.
Corso Vittorio Emmanuele II, 6
10123 Torino / IT
[N/P]
Former [2024/21]Meindl, Tassilo
Buzzi, Notaro & Antonielli d'Oulx S.p.A.
Corso Vittorio Emanuele ll, 6
10123 Torino / IT
Application number, filing date23207659.603.11.2023
[2024/21]
Priority number, dateIT2022002361016.11.2022         Original published format: IT202200023610
[2024/21]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP4373038
Date:22.05.2024
Language:EN
[2024/21]
Search report(s)(Supplementary) European search report - dispatched on:EP10.04.2024
ClassificationIPC:H04L12/40
[2024/21]
CPC:
H04L12/40006 (EP); H04L12/40013 (CN); G06F13/4282 (CN,US);
G06F12/06 (CN); G06F13/28 (CN); G06F13/4068 (CN);
G06F9/45558 (CN); G06F9/5027 (CN); G06F2213/40 (US);
H04L2012/40215 (EP,CN); H04L2012/40273 (EP,CN) (-)
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   ME,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2024/35]
Former [2024/21]AL,  AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HR,  HU,  IE,  IS,  IT,  LI,  LT,  LU,  LV,  MC,  ME,  MK,  MT,  NL,  NO,  PL,  PT,  RO,  RS,  SE,  SI,  SK,  SM,  TR 
Extension statesBANot yet paid
Validation statesKHNot yet paid
MANot yet paid
MDNot yet paid
TNNot yet paid
TitleGerman:VERARBEITUNGSSYSTEM, ZUGEHÖRIGE INTEGRIERTE SCHALTUNG, VORRICHTUNG UND VERFAHREN[2024/21]
English:PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD[2024/21]
French:SYSTÈME DE TRAITEMENT, CIRCUIT INTÉGRÉ ASSOCIÉ, DISPOSITIF ET PROCÉDÉ[2024/21]
Examination procedure19.07.2024Examination requested  [2024/35]
19.07.2024Date on which the examining division has become responsible
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Documents cited:Search[A]WO9506378  (NAT SEMICONDUCTOR CORP [US]);
 [A]EP1085722  (KONINKL PHILIPS ELECTRONICS NV [NL])
by applicantEP1085722
 US10678726
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