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EP4372564
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Extract from the Register of European Patents
EP About this file: EP4372564
| EP4372564 - FAULT DETECTION DURING ENTRY TO OR EXIT FROM LOW POWER MODE [Right-click to bookmark this link] | Status | The application has been published Status updated on 19.04.2024 Database last updated on 29.07.2024 | Most recent event Tooltip | 17.06.2024 | Amendment by applicant | Applicant(s) | For all designated states NXP USA, Inc. 6501 William Cannon Drive Austin TX 78735 / US | [2024/21] | Inventor(s) | 01 /
Abhishek, Kumar 5656AG Eindhoven / NL | 02 /
Shekhar, Subhashrahul 5656AG Eindhoven / NL | 03 /
Musunuri, Aditya 5656AG Eindhoven / NL | 04 /
Zheng, Yi 5656AG Eindhoven / NL | [2024/21] | Representative(s) | Miles, John Richard NXP SEMICONDUCTORS Intellectual Property Group Abbey House 25 Clarendon Road Redhill, Surrey RH1 1QZ / GB | [2024/21] | Application number, filing date | 23209347.6 | 13.11.2023 | [2024/21] | Priority number, date | US202218055915 | 16.11.2022 Original published format: US202218055915 | [2024/21] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP4372564 | Date: | 22.05.2024 | Language: | EN | [2024/21] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 09.04.2024 | Classification | IPC: | G06F11/14, G06F11/07, G06F1/3203, G06F21/79 | [2024/21] | CPC: |
G06F11/1441 (EP);
G06F1/30 (EP,US);
G06F1/28 (EP);
G06F1/3203 (EP);
G06F1/3296 (US);
G06F11/0772 (US);
G06F11/0778 (EP);
G06F11/0796 (EP);
G06F11/1417 (EP);
| Designated contracting states | AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, ME, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR [2024/21] | Extension states | BA | Not yet paid | Validation states | KH | Not yet paid | MA | Not yet paid | MD | Not yet paid | TN | Not yet paid | Title | German: | FEHLERERKENNUNG BEIM EINTRITT IN DEN ODER AUSGANG AUS EINEM NIEDRIGLEISTUNGSMODUS | [2024/21] | English: | FAULT DETECTION DURING ENTRY TO OR EXIT FROM LOW POWER MODE | [2024/21] | French: | DÉTECTION DE DÉFAUT PENDANT L'ENTRÉE OU LA SORTIE D'UN MODE DE FAIBLE PUISSANCE | [2024/21] | Examination procedure | 17.06.2024 | Amendment by applicant (claims and/or description) |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]EP3742257 (NXP USA INC [US]); | [A]US11119153 (SRINIVASAN VENKATA NARAYANAN [IN]); | [Y]EP3926349 (SHENZHEN GOODIX TECH CO LTD [CN]) |